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Chipscale terminators improve signal integrity in high-speed circuits

Posted: 30 Jun 2005 ?? ?Print Version ?Bookmark and Share

Keywords:thevenin termination network? chipscale package?

Designed for terminating signal lines in high-speed digital circuits, TT electronics IRC Advanced Film Division has developed a Thevenin termination network in a chipscale package.

Designated as part of the CHC series, the new 18-resistor ball grid array (BGA) network is designed to maximize signal integrity in high-speed digital circuit designs by combining nine Thevenin pairs in a network schematic. Applications include DDR memory termination, ECL/PECL high-speed logic termination, and single-ended and differential signaling termination.

Available in a wide range of standard and custom resistance values, the chipscale networks also feature absolute temperature coefficient of resistance (TCR) ratings to 1100 ppm/0C and standard tolerances to 11% with operating temperatures from 00C to 700C. Custom designs are available.

The 1-mm pitch series features a 27-element package, measuring 9 x 3 mm, and is available in a variety of package sizes. The BGA packages are JEDEC standard 8-9A compatible. Click here for the datasheet.

"In addition to reduced drive requirements and reduced power dissipation, the Thevenin resistive terminators provide both pull-up and pull-down functions for the circuit," said Jerry Seams, IRC's applications engineering manager, in a statement. "Our BGA package eliminates all wire bonds, effectively reducing the internal parasitic inductance of the resistor network to near zero, as well as minimizing external traces on the PC-board."

Typical pricing for the CHC series devices is $0.99 each in quantities of 10,000. Delivery is ten weeks.

- Gina Roos


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