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Denali storage interface IP bypasses the SoC bus

Posted: 01 Jul 2005 ?? ?Print Version ?Bookmark and Share

Keywords:configurable interface? off-chip dram? flash? serial ata hard-disk drive? integrated data management system?

Intellectual-property vendor Denali Software Inc. announces Dataplex, a data subsystem that provides configurable interfaces to off-chip DRAM, flash and serial ATA hard-disk drive storage.

The privately held company has been selling the Databahn series of configurable memory controllers for use in SoC designs since 2000. The Dataplex product takes Denali to higher complexity, with support for interfaces to data storage subsystems such as flash drives and microdrives, along with control of off-chip memories such as DRAM and flash.

"We see this as a new category of IP, an integrated data management subsystem," said CEO and co-founder Sanjay Srivastava.

Brian Gardner, director of marketing for IP products, said that Dataplex can bring data directly from the hard drive to DRAM without going on the SoC system bus. That can keep the firmware simple, for example, when the CPU asks for certain logical blocks of data. The Dataplex module optimizes the data path by looking ahead at the command queue, determining the queue depth and pipelining the command queue so the memory controller can see more deeply into it.

Dataplex can help designers adjust when a customer shifts memory requirements in mid-design. "The designer can drop a memory model through a routine that goes into the registers and automatically sets up the latencies," Gardner said.

Cellphones and other portable systems have thus far largely incorporated single-data-rate DRAM and NOR flash. Going forward, Gardner said, mobile systems will include more double-data-rate memories that are much more complex. And more phones are adding NAND flash and interfaces to external flash-based memory cards. One-inch hard drives are also starting to hit the cellphone market this year.

"The cellphones, handhelds and media controllers are all at an inflection point," Gardner said. "Now, a design team can put one guy on it and spend a few man-months to integrate an SDR controller with NOR flash. But DDR has low-power modes with dozens of features. The disks are going from parallel to serial ATA, and the CE-ATA [consumer electronics ATA] spec is coming along soon."

Srivastava said that with the Databahn memory controllers, the company learned how data is fed from memories to processors. With Dataplex, Denali is adding the storage subsystem layer and leveraging its ability to integrate configurable data management with verification code.

"Customers don't want to deploy an army of verification engineers. They want to drop our module into the latest and greatest verification methodology and verify," Srivastava said. "If the IP delivery does not come with the latest form of verification, that can be a major bottleneck." Interface controllers must be configurable, and that process must be automated.

Denali has refined its ability to update its products, working with both ASIC and memory vendors to keep a library of 8,000 or more Soma files up to date as memory speeds increased and technologies scaled. Srivastava said that Denali engineers have updated the memory models in a "treadmill" that will now extend to the various high-speed interfaces being incorporated in SoC designs.

"It's all automated, so the customer just gives us the libraries of the process that is being used. We deliver it so it is ready to be dropped in," he said.

Srivastava said future versions of Dataplex will support interfaces for CE-ATA microdrives and fast PCI Express ports.

- David Lammers

EE Times





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