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Transistor's gate stack structure uses Hf-based, high-k dielectric

Posted: 06 Jul 2005 ?? ?Print Version ?Bookmark and Share

Keywords:nec? transistor? hafnium? hf? high-k dielectric?

NEC Corp. has announced the development of a transistor featuring a new gate stack structure using a hafnium (Hf)-based, high-k dielectric and a metal gate electrode. The company said the new development simultaneously realizes significant gate leakage suppression and improvement in transistor operation speed.

The press release further said that the newly developed metal gate/high-k structure is stable even through the conventional CMOS manufacturing process and realizes transistor life time of up to 10 years with practical usage presumed at 85C. According to NEC, this result was mainly enabled by:

? Suitable threshold voltage (Vth) was realized for both PMOS and NMOS based on the composition control of Hf in the dielectric film and Ni in the electrode. NiSi and Ni3Si electrodes were formed on HfSiON with 50 percent Hf/(Hf+Si) composition for NMOS and PMOS, respectively.

? The NMOS and PMOS with a new gate stacked structure realize reduction of leakage current, improvement in sub-threshold current, and carrier mobility. The result is an improvement in transistor current drivability by 28 percent for NMOS(NiSi) and 52 percent for PMOS(Ni3Si).

NEC also stated that the Ni/Si composition of the gate electrode and the Hf/Si composition of the HfSiON gate insulator are the important parameters for obtaining suitable CMOS Vths. The amount of Hf-Si bonds at the gate/insulator interface is the key parameter to control the Vth, the company added. The NiSi and the Ni3Si electrodes on 50 percent Hf and HfSiON-composed film realize suitable Vth with tight distribution for both NMOS and PMOS, respectively.

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