WEDC unveils new RISC MPU

The new WED3C755E8M-XBHX multi-chip package from White Electronic Designs Corp. (WEDC) features a 755 RISC processor (E die revision), dedicated 1MB SSRAM L2 cache, configured as 128K x 72 on a 21-by-25mm, 255 HiTCE Ball Grid Array (HBGA).

Designed for high performance, space-sensitive and low-power systems, the 755E/SSRAM MCP supports the following power management features: doze, nap, sleep and dynamic power management. This new product is footprint compatible with the company's WED3C755E8M-XBX, WED3C7558M-XBX and WED3C750A8M-200BX, and is pinout compatible with the WED3C755E8MF-XBX. It is also footprint compatible with Motorola's MPC 745 and offers HiTCE interposer for TCE compatibility to laminate substrates for increased board level reliability.

Available in commercial, industrial and military temperature ranges, the 755E RISC microporcessor HiTCE MCP, defined as part number WED3C755E8MX-XBHX, is priced at $1,000 each in volumes of 500 pieces with a lead time of 8 to 10 weeks.