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Spice simulation tool adds support for latest BSIM models

Posted: 01 Aug 2005 ?? ?Print Version ?Bookmark and Share

Keywords:tanner eda? t-spice analog circuit simulation platform? berkeley bsim?

Tanner EDA released a new version of the company's T-Spice analog circuit simulation platform, including support for the latest Berkeley BSIM models up to version 4.4.0.

The new T-Spice release supports numerous advanced modeling features to improve simulation accuracy, Tanner EDA said, including gate and body resistance networks for RF modeling, non-quasi-static (NQS) model, comprehensive geometry-based parasitic models for multi-finger devices and stress effects modeling.

Tanner EDA said T-Spice's support for BSIM SOI v3.2 would enable designers using the SOI CMOS process to accurately model partially depleted, fully depleted and unified FD-PD SOI devices. Self-heating and RF resistor networks can also be modeled, the company said, while MOSFET EKV support assists designers needing a continuous, physics-based MOSFET model for low power analog and mixed analog-digital circuit design.

Version 11 of T-Spice is available now, the company said, priced starting at $5,000 per seat, based on configuration.

- EE Times




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