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Cadence Virtuoso speeds up Cray's supercomputer development

Posted: 18 Aug 2005 ?? ?Print Version ?Bookmark and Share

Keywords:memory arrays? cell libraries? 90nm process? supercomputer? virtuoso?

Cadence Design Systems Inc. and supercomputer provider Cray Inc. have completed a project that migrate the full-custom layouts of the memory arrays and cell libraries. The project is intended for Cray's next-generation vector processing technology to Texas Instruments' latest 90nm process technology.

The migration effort was accomplished by a team of Cray and Cadence engineers using the most advanced layout migration technology from Cadence, the Virtuoso layout migrate product offering. By using the Cadence technology, the team saved significant R&D expense and nearly six months in schedule.

During the development, the Cray-Cadence team was tasked with migrating the custom layouts for five memory arrays within the CPU, as well as the layout for more than 1,000 cell library elements used to implement other portions of the CPU. Cray engineers provided detailed knowledge of the CPU architecture, original technology process characteristics and previous implementations, while Cadence engineers contributed deep expertise in device/cell layout migration in 90nm geometries using automation.

Dave Kiefer, VP of engineering, said, "Given how hard we've been pushing the process technology and the CAD tools on this development, that's a real accomplishment. Leveraging Cadence's advanced technology and expertise for device/cell layout migration enabled us to achieve some major technology breakthroughs."

Tim Henricks, VP for North American engineering services, Cadence Design Systems, added, "The project with Cray showed the value of complementing technology with engineering services. Some advanced technologies have very steep learning curves, making them difficult for customers to adopt while 'flying solo' in time-critical projects. Our collaborative engineering approach enables customers to apply and build expertise using latest-generation design technologies on current projects without compromising their development schedules."

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