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Architecting miniature hard disk drives for battery saving

Posted: 18 Aug 2005 ?? ?Print Version ?Bookmark and Share

Keywords:agere systems? consumer electronics? ce? storage? mobile phones?

By Duncan Furness
Agere Systems

The growing popularity of portable consumer electronics (CE) products that use high-capacity storage, from mobile phones to audio/ video players and digital cameras, is challenging the disk drive industry to develop unique solutions that meet the rapidly evolving demands.

Power consumption is especially critical in handheld CE devices. Makers expect new small-form factor (SFF) drives (1-inch and 0.85-inch) to store more music and deliver fast read/write speeds supporting video playback and other functions, placing greater strain on power consumption.

Portable CE devices continue to expand into more advanced, storage-intensive applications, with mobile phones representing the most logical point of convergence given their widespread use and growth rates. New mobile phone designs incorporating media player functionality and other capabilities are allocating roughly 10 percent of their power budget to storage needs which, depending on the battery technology, translates to an average power consumption of about 110mW.

Lithium-ion currently is the battery of choice in hand held applications. Disk drive operating voltages have been reduced to 2.7V minimum to approach the knee of the battery's operating point for maximum play time.

Figure 1 offers an illustration of the typical current duty cycle when transferring streaming music files. In general, the host will place the drive into a low-power state or power-down mode when no data is being transferred. When data transfer is required the drive will spin up, transfer a lot of data at the fast HDD transfer rate into the host buffer and then return to the low power state. The host will then pull data from the buffer at the slower application rate. This allows a very low duty cycle for the drive resulting in low average power consumption and thus better battery life. However, even when the drive is transferring data it will utilize its power management techniques to minimize power. For example, the highest power will occur during a sector read but when the host is busy, the drive will wait and go into a lower power state.

Figure 1: Typical current consumption in MP3 players tends to be bursty, peaking where a song-search forces the drive to seek a new track

A buffer is used as a host speed matching device. The size of the host buffer will determine the power dissipation; more buffer means less power-hungry spin up/down drive cycles, resulting in lower average power dissipation. Tradeoffs in buffer size, power and cost, help host manufacturers select a buffer that meets the power dissipation goals of the application while minimizing cost. Typical music player buffers are in the range of 8MB to 16MB, very small, with resultant price pressure driving the HDD manufacturers to decrease power.

Figure 2: The disk drive electronics uses two controllers, in addition to the read channel.

As shown in Figure 2, disk drive electronics consist primarily of a preamplifier (PA) IC, motor controller (MC) IC and an integrated system- on-a-chip (SoC), which combines read channel and hard disk controller technology along with the required I/O and memory. Breaking down the power budget for a miniature drive (Figure 3) shows that storage electronics represent roughly half of the total power consumed, with the remainder coming from mechanical and electromechanical components (mostly in spinning the drive up and down). The SoC consumes the majority of power as its primary function serves to manage and transfer data on and off the drives magnetic platters. Note that this power breakdown consists of instantaneous power contributions like disk seeks and will be lower when averaged in a typical host application.

Figure 3: A sample disk drive power budget will expend energy on the mechanical interface. Starting a disk spin will be most severe.

With storage ICs consuming nearly 50 percent of total disk drive power, there are a number of significant opportunities for silicon suppliers to improve system-level power performance. Specific areas include innovations in voltage regulation, drive partitioning, interfaces, power management schemes and semiconductor process technologies.

Two supplies needed
A typical HDD will need two voltage supplies digital core voltage for the logic and an analog voltage for motor drive, analog-to-digital converter (ADC) and interface. The analog voltage historically comes from the host only and is regulated to a maximum value. The core voltage has traditionally been regulated from the host to 1.2V nominal using a linear regulator (Figure 4) within the drives motor controller IC. Today's drives use 3.3V of native power, and linear regulators are used to convert this power to the 1.2V/200mA required for storage ICs. A linear regulator draws 200mA of current and converts at an efficiency rate of only 36 percent.

Figure 4: A sample disk drive power budget will expend energy on the mechanical interface. Starting a disk spin will be most severe.

One of the largest potential improvements in power savings for SFF drives can be achieved by replacing the motor controllers linear regulator with a switching regulator for core voltage generation. While these devices also convert 3.3V to 1.2V, they only draw about 90mA of current, for an efficiency rate of 80 percent. The noise typically associated with switching regulators can be cost-effectively managed to maintain a level of signal integrity, and the difference achieved using switching (300mW) over linear (660mW) regulators amounts to a total power savings of 55 percent.

In addition, the use of a switching regulator saves additional power, by reducing the digital core voltage from 1.2V to 1V.

Figure 5: The use of a switching regulator saves additional power, by reducing the digital core voltage from 1.2V to 1V

Another target is lower analog voltages. Voltage from the host is typically controlled to 3.3V max, but opportunities exist to reduce power dissipation by targeting a nominal 2.5V operation. However, this needs to be addressed through either a lower host voltage or by onboard regulation in the HDD. If using the latter method, there is minimal power reduction due to efficiency losses of the regulator (even a switching regulator). This approach only makes sense in systems using lower host voltage supplies.

Host/drive partitioning
Another opportunity for power savings can be found in effective drive/host partitioning, whereby functions are migrated from the host to the drive or vice versa. As additional multimedia features are added to portable devices like media players and mobile phones, functional integration through repartitioning offers the advantage of reducing overall power as well as increasing precious real estate in a handheld device. While many of today's devices contain standalone, removable drives, the use of embedded disk drives designs will capitalize on power, size and cost savings.

Functional integration eliminates redundancies in processing and circuitry overhead, and reduces the number of interconnects, resulting in reduced power for the portable device.

Figure 6: Functional integration eliminates redundancies in processing and circuitry overhead, and reduces the number of interconnects, resulting in reduced power for the portable device. (Click to view full image)

Power management enables the host to effectively manage the drives power consumption. The storage SoC typically has a multi-state sequencer allowing self-managed power management capabilities through firmware control. These functions adjust the power level depending on the drive settings and include the ability to selectively deactivate circuitry, enable/disable clocks in all functional blocks, and provide dividers for functional blocks where clock disabling is a problem. Other power management techniques involve selecting the correct system clock frequency to optimize the drive, typically achieved through choosing the appropriate processor clock rate. These functions all serve to maximize overall power efficiency.

Architecting for durability
Active protection of disk drives has become essential as these high capacity products become more popular in portable consumer electronics.

Improving the ruggedness of these devices requires the ability to reliably detect a free-fall drop and to park the drive heads prior to impact. This is no easy task, given that a simple free fall from one meter to the ground can take less than half a second.

At the semiconductor level, small-form-factor drives require a coordinated design efforts between the motor controller chip, the storage SoC (or read channel), the preamplifier and the sensors used to detect free-fall events (see Figure 7). Miniature drives currently employ one of two sensor typesshock sensors or accelerometers, along with the associated algorithms.

Figure 7: The storage SoC and sensors are used to detect free-fall events and withdraw the read/write heads to a safe position.

When a drop occurs, the motor controller IC receives an input signal from the sensor and, in drives using shock sensors, will amplify the analog signal and convert it to digital. The motor controller then compares the signal to a reference to determine if the signal is abnormal. Consumers will not tolerate a lot of false positives unnecessarily shutting the device down, or false negatives failing to protect the device prior to a drop, so care is taken in conditioning the signal to ensure a proper reading against this window comparator. If the signal falls outside these references, the motor controller alerts the SoC that the drive is in free-fall.

The SoC will first check the drive status to see if it is in a seek operation or in idle mode. In contrast to desktop PC disk drives that perpetually keep the heads positioned over tracks on the spinning platter when not reading or writing, miniature drives value battery savings over data transfer speed, and therefore shut down the spindle motor and park the Head Stack Assembly (HSA), on its ramp when in idle mode. If the drive is in write mode, the SoC will have the preamplifier IC shut off the write current while the motor controller shuts down the spindle motor and moves the HSA to its ramp.

New SFF drive designs will need to increasingly rely on chips to speed reaction time.

About the author
Duncan Furness
is senior technical manager for the SoC business within the Storage division of Agere Systems. He holds patents in Robotic Positioning for Tape Automation and Servo Wedge for Hard Disk Drives.

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