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Cadence solution to improve productivity, accuracy of design time

Posted: 26 Aug 2005 ?? ?Print Version ?Bookmark and Share

Keywords:cadence design systems? ic packaging technology? cadence allegro system interconnect design platform?

Cadence Design Systems Inc. announced the latest advances in its IC packaging technology, designed to improve productivity and accuracy for shorter design cycle time. According to the press release, the Cadence Allegro system interconnect design platform has been enhanced with improvements in the Cadence constraint-driven IC packaging co-design flow and enhanced power and signal-integrity analysis accuracy.

The new Cadence IC packaging technology, part of the latest Allegro release, improves accuracy for advanced package modeling with an easy-to-use, unified design flow for faster creation of complex package models. With the Cadence IC packaging solution, complex packages are modeled by solving for 3D structures and generating multi-port S-parameter models that are accurate up to 4GHz, said the company. This embedded 3D field solver approach also provides faster model creation compared to the traditional approach of loosely integrated point tools.

As part of the latest TSMC Reference Flow 6.0, the Allegro package designer provides an integrated power-integrity verification flow with VoltageStorm Dynamic Gate power analysis so that IC core dynamic IR drop in the chip can be predicted, including package load effects. Integration creates models of the package PWR/GND structures, which map directly to the IC bump ports and create a complete package-silicon PWR/GND network for verification. The Allegro-VoltageStorm integration automates the flow, eliminating error-prone manual model generation and mapping, explained Cadence.

"These additions to our production-proven IC packaging technology extend our leadership in this important market," shared Jamie Metcalfe, VP of marketing for IC Packaging Co-design products at Cadence. "We continue to focus our technological development on simplifying the design process and helping manufacturers design products for fast volume production."

Productivity and ease-of-use improvements include wirebond design reuse, which provides the ability to reuse complex wirebond tiers in different designs. The addition of a Microsoft Excel interface for I/O planning data completes the offering, added the EDA company.

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