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The changing face of automotive ECU design

Posted: 01 Sep 2005 ?? ?Print Version ?Bookmark and Share

Keywords:programmable logic? ecu? fpga? cpld? mcu?

Microcontrollers (MCUs) and microprocessors (MPUs) have long been the natural choice to implement control functions in instrument clusters, door modules and other electronic control units (ECUs). Design experience and legacy code are two of the many reasons to keep using such devices.

There is a tendency to build software topology in logically partitioned function blocks that meet the ECU specification. But only when these function blocks are compiled and targeted at a single device will we see real-time issues associated with sequential code. Although these functions were built discretely, they will run sequentially based on a predefined prioritization structure.

These timing issues may not be immediately apparent. Any interrupt collision issues will not be caught in simulation because the tendency is to only test what you know should workand it is almost impossible to test for indeterminate states or real-time fault conditions. Any function that runs off of an interrupt can only really be tested after the system is built up and run in real-time. At this point, we can catch more of the errors, but only when the product hits the road will every conceivable interrupt state be tried and tested. We have to hope that these are not major failures and that they can be fixed with a software patch at the next scheduled vehicle service.

Function interdependency

With programmable logic, you can build a system in the same way as with an MPU or MCU by implementing discrete functional blocks. But unlike micro code, these functions are totally independent. They are instantiated in hardware as opposed to software, will run in real-time and are not susceptible to erroneous errors or interrupt states.

Each function will operate independently and is guaranteed to run as described every time, under every condition. Another benefit is that you can simulate every state before building any hardware, so the risks of operations or tasks not functioning as requiredor happening out of sequenceare reduced.

When building an instrument cluster, you may need to simultaneously display a "tell-tale" based on the driver pushing a switch, respond to a CAN packet dictating the position of the tachometer and handle an error message from the braking system that must be displayed urgently to alert the driver. In software-based systems, these tasks run sequentially. You must give priority to the error message, but which task runs when and in what order depends on when the interrupt hits the micro.

In a PLD-based system, all of these functions are handled in parallel and displayed as soon as the message hits the device. The parallel processing available in FPGAs and CPLDs offers an advantage in applications where instant, uninterrupted signals must be processed reliably.

Board-level functions

As designs become more complex, more peripheral functions are controlled by 8bit MCUsbut these may not have sufficient I/Os. Solutions to this issue include stepping up to a more costly 16bit MCU and partitioning the design over a low-cost 8bit MCU and CPLD.

Consider a system that has multiple ADC inputs used as data inputs to help control and position multiple stepper motors (such as in an instrument cluster) plus other I/Os for LED control and switch inputs. The low-cost MCU is suitable for sequential signal processing, but has limited I/Os to interface to off-chip devices.

The CPLD can interface to the MCU through a simple serial bus and provide low-cost I/Os to the devices that need to be controlled. Although this approach may increase the board component count, the combined cost of an 8bit MCU and CPLD is lower than that of a 16bit MPU. This approach also allows the board to be adapted to suit many customer configurations through the CPLD, providing the ability to interface to many different devices under control.

Figure 1 shows a typical example of where a CPLD can be used alongside an MCU, providing extra I/O to connect to multiple indicator LEDs and control multiple motors. The CPLD in this example also provides simple PWM functions and ADC interfacing to aid with motor control, which can enable you to use a lower-cost, basic MCU without PWMs.

Interfacing, bridging

With more bus protocols being supported by assp and MCU vendors, interface translation is a growing problem that requires an inexpensive and easy solution. Offering the lowest-cost method for translating one bus protocol into another, CPLD devices can support interface bridging applications, including voltage-level shifting (3.3Vin to 1.8Vout), bus translation applications (translating a proprietary language to an industry-standard language), serial-to-parallel and parallel-to-serial bus conversions, and DDR memory interfacing.

Figure 2 shows how CPLDs can be used to interface to high-speed memory and also shows an example of a CPLD level-shifting between different voltage levels.

With automotive electronics comprising as much as 90 percent of the functional innovation in new vehicles, it has become even more important to choose the right devices. Automotive design has always been a challenging environment when faced with small-form-factor ECU specifications, wide temperature ranges, high-quality and reliability requirements, and low cost points. Today's designs also need to be flexible, upgradable and easy to test.

For today's automotive advanced electronics systems, programmable logic is a viable alternative to MPUs and MCUs because it offers true design interdependency and parallel processing. CPLDs can be used where MCUs have run out of I/O or processing power, or simply for memory interfacing or voltage-level shifting.

- Karen Parnell

Automotive Product Marketing Manager

Xilinx Inc.




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