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Lead-free rules hit yields, European packagers, says analyst

Posted: 22 Sep 2005 ?? ?Print Version ?Bookmark and Share

Keywords:wafer bumping? packaging?

European requirements for lead-free wafer bumping and packaging are hitting manufacturing yields and also hitting assembly companies in Europe as the far-east copes better with changes, according to research company Frost & Sullivan.

As Europe has been the pioneer of lead regulation it is natural that the European electronic packaging industry leads the world in terms of research and development - backed by leading microelectronic research institutes such as Institut fur Zuverlassigkeit/Mikrointegration (IZM Fraunhofer). However, the European industry is facing a problem of underfinancing and stiff competition from the Far East.

"For instance, Netpack-Europe.org, the official organization for chip packaging manufacturers in the European Union, is likely to be closed during the year due to lack of financial support," said Sivakumar Muthuramalingam, a Frost & Sullivan research analyst, in a statement. "To combat this issue, packaging service providers must develop and implement a fiercely aggressive market strategy with respect to price, customer service, quality and reliability," he added.

A range of websites previously operated by Netpack-Europe.org were unavailable when this story was first posted.

Packaging companies are finding that in some cases the use of lead-free alternatives is causing a loss of yield, Frost & Sullivan said. Participants utilize lead-free alternatives such as tin-silver-copper (Sn-Ag-Cu), also called the SAC system, combined with materials such as gold. However, the slow adoption of these processes is due to issues such as high yield loss and low reliability.

"For instance, flip-chip (FC) assembly qualifies for eutectic lead-tin, but proves to be difficult for lead-free material," said Muthuramalingam. "High yield losses occur after the board assembly due to substrate warpage," he added.

"The integration of lead-free materials into flip-chip and chip scale package applications is difficult due to the material characteristics such as stiffness, and material compliance that increasingly makes reliability an issue. To overcome this, researchers in Germany are continuously working to develop novel wafer bumping technologies for a wide range of applications," said Muthuramalingam.

Although Europe has largely set the agenda around environmental issues with European Union's Restriction of the Use of Hazardous Substances' (ROHS) directive Southeast Asian packaging industry participants are intensifying competition as the packaging service providers in Europe are unable to continue to drive down prices, Frost & Sullivan said.

Peter Clarke

EE Times





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