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Fujitsu rolls 65nm ASIC, SoC process

Posted: 23 Sep 2005 ?? ?Print Version ?Bookmark and Share

Keywords:65nm? asic? soc design? 90nm cs100 transistors?

Enabling the next wave of semiconductors, Fujitsu Ltd has rolled out its 65nm process technology for advanced ASIC and system-on-a-chip (SoC) designs.

Fujitsu (Tokyo) has two 65nm processes, the CS200 and CS200A, which are geared for ASIC and customer-owned tooling (COT) applications. Both technologies are said to provide gate size reductions of 25 percent, compared with its 90nm technology.

The CS200 and CS200A employ 11 copper interconnect layers instead of 10, enabling complex SoC designs. Fujitsu also makes use of copper and porous ultra low-k interconnect technology.

The CS200 series is designed for high-end, high-performance server processor devices and other advanced systems. Applications for the CS200A series include mobile products, such as cellular phones, notebook computers, and other digital consumer products that require minimum power consumption.

"Fujitsu's 65-nm technology provides our customers with a complete set of options that enable them to maximize performance and minimize power consumption in their designs," said Keith Horn, senior vice president of sales and marketing for Fujitsu Microelectronics America (Sunnyvale, Calif.), in a statement. "The CS200 and CS200A series represent technology for performance-oriented applications and mobile products that require long battery life."

Fujitsu claimed a major breakthrough the technology. Gate lengths of the CS200 and CS200A transistors are 30nm long, a 25 percent reduction compared with the transistor size in Fujitsu's 90nm process, dubbed the CS100.

The smaller transistors use a nickel polycide stack in place of the cobalt polycide/polysilicon stack used for the 90nm CS100 transistors. The lower sheet resistance of the nickel polycide ensures lower gate resistance, enabling higher speed, according to the company.

Fujitsu is accepting "customer engagements" using the 65nm CS200 and CS200A now, and the initial tape-outs are scheduled for the first calendar quarter of 2006.

Packaging options include standard BGA and flip-chip BGA. Fujitsu is providing CS200 and CS200A series customers with the company's complete turnkey packaging services, including package design, simulation, assembly and testing.

Fujitsu joins a growing list of companies that have rolled out 65-nm technology, including Intel, Toshiba, TI, TSMC, and others. Taking another major step to address power and leakage issues in IC design, Intel Corp. on Monday (September 20) said that it is developing an ultra-low power derivative of its first-generation, 65nm process technology (see Sept. 19 story).

- Mark LaPedus

EE Times

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