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TD-SCDMA serves as a new battleground for 3G

Posted: 22 Sep 2005 ?? ?Print Version ?Bookmark and Share

Keywords:analog devices? china wireless telecommunications standard group? cwts? international telecommunication union? itu?

By Zoran Zvonar, Analog Devices

TD-Scdma (Time Division Synchronous Code Division Multiple Access) is a technology developed for 3G mobile communication by the China Wireless Telecommunications Standard Group (CWTS). It was proposed as one of the radio transmission technologies to the International Telecommunication Union (ITU) and consequently approved as one of the 3G standards. Relying on combination of time-division duplex (tdd) and synchronous CDMA, TD-SCDMA offers some key advantages, including no need for paired frequencies, suitability for IP services, ability to support asymmetric services in up/down link, and flexibility to incorporate new technologies (e.g. joint detection, adaptive antennas, dynamic channel allocation). Ultimately, these offerings should result in lower investment cost and capital expense savings for operators, providing a viable transition path from 2G to 3G.

TD-SCDMA has been adopted as the low chip rate (LCR) version of the 3GPP TDD standard. The TD-SCDMA system architecture completely follows the 3GPP specification and consists of three parts: user equipment (UE), radio access network (RAN), and core network. The RAN of TD-SCDMA is designed so it can share the same core network with other RANs, such as a WCDMA system, which simplifies multi-mode system design.

Physical layer

The Physical Layer (Layer 1) describes the transmission between the base station (BS) and the UE and includes two directional transmissions: uplink (from UE to BS) and downlink (BS to UE). The major part of system implementation complexity is on the downlink, particularly the UE reception (Figure 1).

The physical layer is typically partitioned in five components: outer transmitter and receiver, inner transmitter and receiver, and wireless channel. The outer transmitter performs scrambling, CRC, channel encoding, rate matching, and interleaving, while the outer receiver performs the reverse operations. The inner transmitter and receiver perform physical channel mapping, modulation, spreading, and reverse operation. The wireless channel includes the analog front-end characteristics of the UE and air propagation channel.

Because TD-SCDMA is based on TDD mode, the downlink and uplink share the same frequency band. Each sub-frame consists of ten time slots (TS), seven of which can be used for data transmission (Figure 2). The remaining three are for timing synchronization.

Figure 1: The path of the physical channel model is shown.

Figure 2: The structure of a typical data time slot is shown. Each TS contains four parts: data part 1 and 2, midamble for channel estimation, and guard period for avoiding inter-burst interference.

Looking into the inner transmitter's structure, binary coded bits are mapped into QPSK (or 8PSK) complex symbols (Figure 3). To reduce the peak-to-average-ratio of the multi-code UE's TX signal for each physical channel, the complex symbols are multiplied by a channelization code-specific multiplier before spreading with channelization codes. These are also known as the orthogonal-variable-spreading-factor (OVSF) codes. Note that in the downlink of TD-SCDMA systems, the spreading factor is either 1 or 16.

Figure 3: After the spreading process, the chip rate signals are further multiplied with a scrambling code.

After spreading, the chip rate signals are further multiplied with scrambling code (16-chip complex sequence). Finally, the real and imaginary parts of chip sequence are passed through root-raised cosine filters and up-converted to the desired carrier frequency.

Receiver design
Receiver design is at the heart of wireless systems, which is even more true in the LCR case. Consequently, the receiver carries most of the complexity in implementation. Multiple users in LCR are multiplexed using their assigned OVSF codes. However, the orthogonality is not preserved due to the delay spread in the multi-path channel and the received signal at the input, where the UE is subject to multi-user interference (MUI). Conventional receivers applied in CDMA systems (e.g., a RAKE receiver) have poor performance in this case and a more complex multi-user receiver design is a better choice.

Multi-user reception has flourished over the last decade, providing fertile ground for efficient multi-user receiver structures. Certain receiver structures are better suited for given link-level scenarios. Specifically, in the TD-SCDMA case, the maximum number of codes in a time slot is 16 so they can be easily processed in parallel. For example, a sub-optimal multi-user detector, commonly known as the joint detection (JD), can reduce the MUI by using a linear receiver structure. Several approaches can be used for linear receiver design. The two most common optimization criteria are zero forcing (ZF) and minimum mean-squared error (MMSE). Note that the complexity of joint detection is independent of the symbol constellation. The specific structure of correlation matrix, block-Toeplitz, allows for further approximation in the matrix inversion process, further reducing the receiver's complexity without compromising performance.

While the JD algorithm is the central piece of the receiver structure, the key to high performance is in the surrounding functions, including channel estimation, active code detection, SNR estimation, and synchronization in general. Channel estimation in an LCR receiver is performed based on a structured midamble. Two different schemes are outlined in the midamble standard. The common midamble allocation (CMA) scheme is signaled to the UE by higher layers as a part of the physical channel configuration. Depending on the number of channelization codes, a specific midamble shift is assigned to all codes. In CMA, all users share the same propagation channel.

The alternative in the system is to use a default midamble allocation (DMA) scheme. If a midamble isn't explicitly assigned and the use of the common midamble allocation scheme isn't signaled by higher layers, the UE derives the midambles from the allocated channelization codes. In the DMA case, the UE assumes different channel estimates for each individual midamble.

The channel-estimation (CE) structure is derived based on cyclic properties of midamble. The number of channel taps and length of the channel estimate directly impact the structure and the size of the correlation matrix. The challenge in CE is to remove noise- only paths that don't benefit from the receiver's performance. SNR estimations can be viewed as the integral part of channel estimation. An MMSE JD receiver requires SNR estimation to achieve better performance than the ZF counterpart. Different techniques for SNR estimation can be applied in the receiver design. As usual, the tradeoff is between the quality of the estimate and complexity of the estimation algorithm.

The implicit assumption at the receiver side is that the UE knows the channelization codes used by other UEs, which isn't true in practice. To avoid performance loss caused by active codes mismatch, the UE must detect the active channelization codes, whose number could be much less than 16. Different algorithms are proposed to perform the active code detection.

Beside JD, the second largest contributor to receiver complexity is the outer receiver's decoding part. Depending on the amount of protection, which is determined by the class and data rate capability of the UE, either turbo or convolutional coding can be applied. The complexity of decoding techniques is well understood in wireless systems. Typical implementations of convolutional decoders are based on the Viterbi algorithm, while the performance/complexity tradeoff in the case of turbo decoding points to the use of the MAX-log-MAP algorithm.

Integrated solutions
The elements of the chip-set used for the UE include RF TX/RX portion, analog baseband (ABB) with converters and power management blocks, and digital baseband (DBB), along other peripherals, memory modules and applications modules (Fig. 4). Multiple design challenges are associated with each of the blocks. However, the system requirements of TD-SCDMA impose unique problems to DBB design that will be outlined in this section.

Figure 4: Typical partitioning of the UE is depicted here.

The major DBB design challenge in a TD-SCDMA system is in partitioning the receiver functions. Key design goals are to provide stable performance margins with respect to standard, flexibility, and programmability to accommodate changes in the standards and changes in the field, low power, and low cost. It's also important to include the ability to extend to dual-mode operation with other radio access technologies (RATs).

In response to these requirements, solutions range from fully programmable to a combination of DSP and different levels of acceleration in fixed logic to a fixed ASIC. TD-SCDMA is an even more interesting case where requirements for UE classes don't narrow the design choices as in other RATs. One example is the largely programmable solutions for GSM/GPRS/EDGE receivers and unavoidable ASICs for WCDMA chip-rate processing. TD-SCDMA solutions at this stage offer a range of possibilities targeted at different UE segments depending on the RAN's data rate and the applications and services supported in the network.

B.Li et al. "Recent advances on TD-SCDMA standard in China", IEEE Communications Magazine, January 2005.
M. Vollmer et. al., "Comparative study of joint-detection techniques for TD-CDMA based mobile radio systems", IEEE JSAC, August 2001.
K.Shi et al., "Downlink joint detection for TD-SCDMA systems: SNR estimation and active code detection", to appear in Proceedings of IEEE VTC 2005.)

About the author
Zoran Zvonar
manages the Systems Development Group at Analog Devices, focusing on the design of algorithms and architectures for wireless communications. Zvonar can be reached at

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