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Synopsys unveils its latest floorplanning, analysis solution

Posted: 23 Sep 2005 ?? ?Print Version ?Bookmark and Share

Keywords:synopsys? floorplanning? jupiterio?

Synopsys Inc. extended its floorplanning solution with the introduction of JupiterIOan enabling technology for concurrent die and package floorplanning and analysis that targets flip chip design flows. JupiterIO is part of the Galaxy Galaxy Design Platform.

Using an early access version of JupiterIO in their flows, said Synopsys, leading-edge companies such as Tundra Semiconductor have achieved significant productivity gains and cost savings on their latest flip chip designs.

"Synopsys has worked closely with leading semiconductor companies such as Agere and Tundra to bridge the silicon and package domains and speed delivery of lower cost flip chip designs," said Antun Domic, senior vice president and general manager of Synopsys Implementation Group. "With JupiterIO, we address the unique requirement of this growing design segmentmaking packaging co-design available in early design planning. In fulfilling this need, we also further enhance the concurrent optimization capability within the Galaxy Design Platform."

JupiterIO supports a package-influenced methodology that uses system and package constraints as a start-point to chip-level floorplanning. It can simultaneously access both chip and package databases, which facilitates real-time tradeoff and evaluation of key components of the die and package interface. This feature eliminates the delay and iterations associated with traditional, non-concurrent flip chip flows that rely on static post-floorplanning data for IO/package design.

JupiterIO is generally available today.




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