ST, Synopsys demonstrate SATA IP compatibility for 90nm

STMicroelectronics and Synopsys announced that they are working together to conduct Serial ATA (SATA) interoperability testing using ST's 90nm Multi-Interface PHY (MIPHY) physical layer interface macro-cell and Synopsys' DesignWare SATA host controller intellectual property (IP) core.

The companies said the interoperability testing would reduce integration risk and speed time-to-market for designers integrating SATA functionality into their SoC designs.

According to ST and Synopsys the companies' joint solution for SATA is fully compliant with the current version of the SATA Integrated Specification Revision 2.5, including support for the latest features. The MIPHY test chip already operates at up to 6Gbps, the companies said, preparing the way for the next evolution of the SATA and SAS standards.

"ST's close collaboration with Synopsys has allowed us to implement and fully verify the interoperability of the MIPHY during the Plugfest," said Roberto Fantechi, general manager of ST's Data Storage Division, in a statement. "We are extremely satisfied with the performance of the macrocell, even when exposed to noisy environments and temperature, and supply voltage worst case conditions."

- EE Times