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Fluorine sweeps high-k defects out of the gate

Posted: 06 Oct 2005 ?? ?Print Version ?Bookmark and Share

Keywords:freescale? hafnium oxide? silicon dioxide? fluorine? gate stack?

Hafnium oxide, the anointed successor to silicon dioxide in the gate stack, has a new ally: fluorine.

Defects in the hafnium oxide layer can be passivated by implanting fluorine into the gate stack, much as boron dopants are implanted in the source and drain regions, Freescale Semiconductor Inc. researcher Hsing-Huang Tseng said here last week at the second International Symposium on Advanced Gate Stack Technology.

gate oxide researchers have made progress in recent years in two areas that have bedeviled the effort to find a worthy successor to silicon dioxide. Mobility of the electrons and holes has improved, and the threshold voltage has stabilized somewhat. Further progress in reliability is needed, however, if hafnium oxide is to be used, either at the 45nm node or, more likely, at the 32nm node.

At last week's symposium, sponsored by International sematech, Tseng summarized a Freescale research effort into fluorine that will be presented in more detail in early December at the International Electron Devices Meeting (IEDM).

The root cause of threshold voltage instability, and mobility degradation, lies in vacancies in the gate stack. The high-k oxides are deposited on the channel, rather than thermally grown as in the case of silicon dioxide, resulting in nonideal bonding of the atoms. Oxygen tends to diffuse downward, out of the hafnium dioxide, to form a silicon dioxide interface layer between the HfO? and the silicon channel, Tseng explained.

Clearing traps

The resulting oxygen vacancies in the bulk oxide form traps for electrons and holes, slowing mobility and causing threshold voltage instability.

Tseng said his team at Freescale created NMOS transistors with a thin layer of amorphous silicon on top of a tantalum carbide metal gate electrode. The electrode is above a hafnium dioxide layer. After the source and drain were annealed, fluorine was diffused into the gate stack, using implant techniques.

Fluorine has a strong propensity to bond with silicon, Tseng said, thus reducing silicon's ability to attract oxygen in the bulk oxide layer, or in the interface layer.

"This involves standard thermal cycles, and no extra masks. If we can passivate the defects in these high-k materials, then we will have fewer oxygen vacancies, less charge trapping and better mobility," Tseng said.

He declined to provide details, saying that they would have to wait for the IEDM in Washington, D.C.

John Robertson, a professor of electrical engineering at Cambridge University, said nitrogen implants may also serve to limit oxygen vacancies.

"The high-k's are in a lot better situation than in 2001," Robertson said. "About 90 percent of the problems have been solved with the high-k oxides themselves. The problem is that the implementation of high-k is now tied to bringing in metal gate electrodes at the same time, and the materials problems with the metal gates have not been solved. Trying to do two things at once is too much for the industry to solve so quickly," Robertson said.

Replacing doped polysilicon as the gate electrode has proved challenging, but progress is being made, Tseng said. Tantalum carbide works well as the NMOS electrode, and several companies have made tantalum alloys their consensual choice for the NMOS electrode.

For the PMOS electrode, ruthenium and other noble metals are being tested, and Freescale is "very close" to coming up with a PMOS gate stack that performs well, he said. "For the NMOS transistors, the mobility of the fluorinated devices is comparable to the best conventional devices made with polysilicon and silicon dioxide. For the PMOS, we are very close, and I am optimistic."

T.P. Ma, chairman of the electrical engineering department at Yale University, said he also believes that fluorine is the best means of creating "high-k interfaces that are as good as what we have with SiO?."

Ma said other research teams have looked at high-pressure deuterium and nitrogen as the passivation agents. "I think Freescale is on the right track with fluorine, and I'm excited about their demonstration. It shows there is no fundamental reason why we can't get good performance with high-k oxides and metal gates," said Ma.

Paul Kirsch, an IBM assignee to Sematech, said in a presentation that "the good news is that mobilities [in high-k and metal gate stacks] are comparable with nitrided silicon dioxide. We are close to the goal of 10-angstrom EOT [effective oxide thickness] and 90 percent of the SiON mobilities."

EOT is a measurement that equates the electrical performance of a high-k with the equivalent thickness of a nitrided silicon dioxide layer. High-k materials are needed because conventional oxides have become so thin that carriers can tunnel through, causing unacceptable levels of current leakage. A thicker physical layer of a high-k material would prevent current leakage, while allowing the effective oxide thickness to be thinned below the 10- to 12-angstrom limit of silicon dioxide.

What continues to challenge the industry is the level of stability in the threshold voltage, Kirsch said.

It now appears extremely doubtful that high-k oxides can be inserted into the 45-nm node, said two senior manufacturing managers at a symposium panel discussion. The discussion addressed the challenges of integrating a high-k/metal gate electrode stack into manufacturing. What might appear feasible in an R&D lab when a few devices are made needs further refinement before it can be used in a production fab environment, the panel concluded.

IBM's Paul Agnello, manager of its 45nm high-performance device and integration program, said, "Threshold voltage scattering is a killer" - one that the high-k community needs to further improve before high-k oxides can be introduced into manufacturing.

Several symposium speakers said that prototype high-k transistors have threshold voltage stabilities that are within a 30- to 40-millivolt range. For integrated circuits, such as the billion-transistor microprocessors that include huge on-chip caches, Vt needs to be stabilized to about 10- to 15-mV fluctuations, Agnello said.

"Adding additional fluctuations, either random or systematic, means that we are giving up margin in terms of function and reliability," Agnello said.

Those threshold-voltage margins grow tighter as scaling proceeds beyond the 45nm node to the 32nm and 22nm nodes, he said. If the work functiondefined as the energy it takes to remove an electron from the surface of a metal electrode when it is in contact with the dielectriccannot be tightly controlled, that will make it more difficult to control short-channel effects, he said.

"If we were able to insert a high-k solution into the second generation of the 45nm node, it would have to be extendable to the 32nm node," he said, adding that bringing in a new material could not disrupt the "ground rules" provided to design teams for 45nm-generation designs.

Bill Taylor, a Freescale process integration manager, said the industry may go to hybrid orientation substrates faster than many people expect, with the NMOS transistors built on 1-0-0-oriented silicon and the PMOS transistors created on 1-1-0 silicon. The research community needs to study the impact of high-k with metal gates on transistors created in 1-1-0-oriented silicon, the Freescale manager said.

Also, he said more work needs to be done to determine if high-k with metal gates has any adverse effects on the strained channels that are being widely used to increase mobility.

"Different orientations of the substrate are certainly on the road map, but there is no data in the literature" on the impact of high-k on the different crystal orientations, Taylor said.

Ivo Raaijmakers, the chief technology officer at ASM International, said in a telephone interview that one possibility is that Japan-based semiconductor companies may introduce silicated forms of hafnium oxide, with somewhat less aggressive k-values, for low-power ICs at the 45nm node.

Japan studies

Japanese vendors are evaluating both atomic-level deposition and chemical vapor deposition techniques for depositing the high-k materials, as well as the metal electrodes. One scenario is for the hafnium silicates to be combined with polysilicon gate electrodes for low-power ICs.

Ma, the Yale University professor, said he also believes Japanese vendors, including NEC and Toshiba, are likely to bring in high-k for low-power chip sets, cutting gate leakage.

Raaijmakers noted that DRAM manufacturers are likely to introduce higher-k insulators to the DRAM trench capacitors, starting with aluminum oxide and then moving to higher-k solutions incorporating hafnium or zirconium. Also, flash vendors are mulling how to bring in high-k dielectrics for the poly-to-poly dielectric in floating-gate flash.

High-performance logic managers are concerned that their equipment and materials choices for high-k be extendable to FinFETs, which he said may come into use at the 22nm node.

Gregg Higashi, front-end process manager at Applied Materials Inc., said, "What we see is that the high-performance people have not been able to solve all of the problems with high-k and metal gates.

"The low-power people are more flexible, and they are trying to implement high-k," Higashi said. "Most likely, for the low-power chips at the 45nm node, we are in a situation where the R&D people know they have something, but they have to convince the manufacturing people that it is production-worthy."

Leakages also can be cut by optimizing the nitrided silicon dioxides, he said.

"We have seen 10x leakage reductions with optimized nitrogen content in the silicon dioxide, but lots of times there is mobility degradation from too much nitride. But if companies tweak it just right, if they place the nitrogen atoms and then anneal the defects properly, they can improve leakage currents with nitrided SiO?," Higashi said.

- David Lammers

EE Times

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