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STATS ChipPAC wants to be 3D king

Posted: 20 Oct 2005 ?? ?Print Version ?Bookmark and Share

Keywords:stats? chippac? packaging? singapore?

Nearly two years after the big merger, Singapore's STATS ChipPAC Ltd is treading slightly above stormy waters in the competitive chip packaging and test market.

Whether it sinks or swims remains a question for the company, which is the result of last year's surprising $1.6 billion acquisition of ChipPAC Inc. of the United States by ST Assembly Test Services Ltd (STATS) of Singapore.

But despite competitive pressures and a string of financial losses, STATS ChipPAC continues to move full speed ahead in its quest to become a complete turnkey subcontractor - and the king in "three-dimensional" packaging.

On Tuesday (Oct. 18), STATS ChipPAC moved in that direction by announcing it has added a new family of thin, die-stacked packaging solutions with profile heights of less than 0.50-mm. In addition, the company is also beefing up its 3D, flip-chip, system-in-package (SIP) and other packaging offerings to meet growing demand from its customer base, such as Analog Devices, Broadcom, Marvell, among others.

STATS ChipPAC is also is scrambling to procure more IC testers from Teradyne Inc. to boost its worldwide chip-testing capacity. And it also continues to bolster its worldwide logistics programs in an ongoing effort to become a one-stop shop of IC assembly, packaging and test services, said Scott Jewler, chief strategy officer and vice president of sales for Europe and Asia at STATS ChipPAC.

"We see ourselves as a total solutions provider," Jewler said in a recent interview at the company's headquarters here. "We differentiate ourselves in that we can offer assembly, packaging, bumping, test and other services."

Working with a broad-based, turnkey subcontractor is fast becoming a critical piece in the design-for-manufacturing (DFM) puzzle, he said. "Going forward, at 90-nm and beyond, the semiconductor industry will need to align packaging and wafer manufacturing," he said.

STATS ChipPAC believes it has the right formulaand technologyin chip-packaging for DFM. And needless to say, the company has come a long way in a short time.

Not long ago, ChipPAC and STATS were separately mid-sized, niche-oriented subcontractors that were struggling in the semiconductor assembly and test industry. Both ChipPAC and STATS were separately in the top-five rankings among worldwide subcontractors, but the two companies were rapidly falling behind their larger competitors amid a downturn in the IC industry.

Seeking to move up the ranks, STATS last year acquired ChipPAC in a stock-swap deal worth $1.6 billion. The combined company expected to take in more than $1 billion in revenue in 2004, up from about $800 million in 2003.

Officials claimed the two companies were complementary in terms of customers, technologies and core strengths. STATS was stronger in chip-testing, while ChipPAC was more of a factor in IC assembly and packaging.

Today, STATS ChipPAC is the world's fourth largest provider of chip packaging and testing services in terms of sales, behind Advanced Semiconductor Engineering Inc. (ASE), Amkor Technology Inc. and Siliconware Precision Industries Co. Ltd., according to analysts. In total, the semiconductor assembly and test sector is projected to reach $15.3 billion in 2005, up 11.6 percent over 2004, according to Gartner Inc.

However, since the formation of STATS ChipPAC, the company has yet to turn a profit and reported four consecutive quarterly losses. Net loss for the second-quarter was $15.1 million, compared to net income of $4.7 million in the same quarter a year ago.

Second-quarter sales increased 90 percent to $264.3 million, compared to $139.0 million in the same quarter a year ago. This represents a sequential increase of 13 percent compared to the prior quarter.

For Q3, the company expects revenue to be approximately 9-to-14 percent higher than the second quarter of 2005, with US GAAP net loss per ADS of $0.07-to-$0.04.

And what's more, seasonal demand has caught the entire subcontractor community by surprise, causing worldwide shortages of chip-scale packages (CSPs) and PBGA products. Reports have also surfaced that there are growing shortages and price hikes for chip-packaging materials, such as lead frames and substrates. The move has prompted some subcontractors to pass on the costs and raise their prices for select packages.

Demandand possible product shortagesfor chip-packaging services are expected to last at least until the first quarter of 2006, according to industry sources.

STATS ChipPAC, which has 10,849 full-time employees, has manufacturing sites in China, Korea, Malaysia, Singapore, among other locations. Seeking to meet exploding demand, the company recently announced plans to build its second chip assembly and test facility in Shanghai, China.

Target completion of the factory is slated for mid-2006, said Wan Choong Hoe, STATS ChipPAC's chief operating officer. "We view China as a strategic location to provide customers with high volume laminate products from design to distribution, evolutionary stacked die solutions, and advanced SIP technology," he said in a recent statement.

Besides the booming market in China, STATS ChipPAC also sees some new and revolutionary drivers for packaging. Space-constrained portable electronics such as cellular phones, mini disk drives, MP3 players and miniaturized consumer electronics are driving the need for smaller and thinner packaging solutions.

To meet these demands, the company is expanding its capacity for flip-chip assembly. But according to Jewler, its main goal is to become the world's leader in 3D packages, such as chip-scale packaging (CSP) and die-stack.

For applications such as cell phones, the company is also moving into the package-in-package (PiP) and package-on-package (PoP) segments. PiP is a 3D package that stacks an internal stacking module on top of a base assembly package to form a CSP. PoP is a 3D package in which fully tested packages such as single die FBGA or stacked-die FBGA are stacked on top of another single-die FBGA or stacked-die FBGA during the board mount process.

"We think we're the leader in die-stack." Jewler said. "We just started volume shipments [of PiP and PoP]."

The company has also put a new spin on current technology by rolling out a new family of extremely thin packaging solutions with profile heights of less than 0.50mm. These extra thin packages are able to accommodate die shrinks without changing the package footprint as well as integrate more than one device within the package, according to the company.

STATS ChipPAC utilizes a 0.13mm two metal layer laminate substrate, wafer thinning down to 75 microns and advanced molding technology. The company's Extremely Thin Fine Ball Grid Array (XFBGA) package features a maximum height of 0.50mm, while the Extremely Fine Land Grid Array (XFLGA) package achieves a maximum height of 0.45mm.

"We have taken our deep knowledge base in die stacking and applied key enabling technologies to develop an extra thin package offering for customers," Jewler said. "By combining conventional wire bond equipment and processes with advanced wafer thinning technologies, we are able to offer customers a leading-edge solution that still satisfies the cost sensitive demands of consumer applications."

XFBGA and XFLGA packages are available in single or multiple die solutions utilizing lead free material sets, with or without eutectic or lead free solder balls. STATS ChipPAC has currently qualified up to two die in a side-by-side configuration. Additional die configurations are possible based on the application requirements.

- Mark LaPedus

EE Times





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