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VXS board packs dual 2.2GS/s A/D channels

Posted: 21 Oct 2005 ?? ?Print Version ?Bookmark and Share

Keywords:tek microsystems? qinetiq? quixilica neptune 2 vxs? fpga?

Quixilica Neptune 2 VXS

When it comes to high-performance plug-ins for realtime DSP applications, TEK Microsystems Inc. is right up there with the likes of Pentek, Mercury Computer Systems and Thales. Now that TEK has an accord with QinetiQ, you're likely to see more jointly developed products, including carrier, payload, PMC/XMC, and single-board computers.

Note that QinetiQ is one of Europe's largest tech companies, with lots of expertise in defense and security. It's a spin-out of Europe's DERA (Defense Evaluation and Research Agency), the laboratories of the United Kingdom Ministry of Defense. Obviously, the company has a track record.

As the press release points out, the new Quixilica Neptune 2 VXS combines FPGAs (field programmable gate arrays) with dual 2.2GS/s data conversion channels. The 6U-sized VME/VXS (VME Switched serial specification) payload card can also operate with up to 10-bit resolution and with multi-channel synchronization.

These boards can also be populated with only a single channel, if that's all your application needs. Kudos to TEK for offering cost-effective configuration possibilities.

About VXS
As for the VXS switched serial interconnect, it's an adjunct to the venerable VMEbus, and works with VMEbus's parallel bus architecture. But, it also supports switched-fabric interconnect technologies such as Infiniband, PCI Express, Serial RapidIO 4X, and 10-Gbit Ethernet. VXS lets them communicate across a VME backplane.

In VXS, an individual transaction can have up to fifty times the bandwidth that it would have on VME64's parallel bus. Also, aggregate bandwidth in a chassis can be as much as 900 times the aggregate bandwidth available on the VME64 parallel bus!

This bandwidth is delivered in a very low-latency environment (an individual switch in VXS can pass traffic with latency as low as 150ns). VXS adds a high-speed connector to VME boards to support the switched fabric interconnects, with data rates up to 2.5GBps for each 6U payload slot.

In this product, the VME64 interface is used only for powering the card (the VME bus interface isn't implemented). Control and I/O is implemented using high-speed serial links available on the front panel and/or the plug-in's backplane P0 connector. The card can also be used standalone (without a backplane).

VITA-mins, too
The Quixilica Neptune 2 VXS can be used as a payload card (as defined in the VITA 41.0 VXS spec), or it can be used in a standard VME64 chassis (if its P0 connector isn't populated).

As a VITA 41.0 payload card, up to eight serial links running at speeds as fast as 3.125Gbps (full duplex) are supported (via VITA 41.0's MultiGig RT2 P0 connector). Custom or standard protocols can be run over these links by loading firmware in the board's FPGA. More on the FPGA in a moment.

Optical I/O modules
The front-panel serial I/O is implemented using two SFP (small form-factor pluggable) connector sites. These can be populated with commercially available optical or copper SFP modules.

Modules supporting data transfer to 2.5Gbps are supplied standard, with PHY (physical layer) support for Gigabit Ethernet, Infiniband and Serial FPDP. SFP modules for longer wavelength optical systems, or copper I/O, can also be supplied.

Finally, the board's P2 connector is used for general purpose I/O. Up to 32 single-ended 2.5V logic lines and sixteen LVDS (low voltage differential signaling) pairs are available on the P2 connector.

Broadband A/D silicon
The press statement mentions chip maker Atmel, but doesn't indicate that the board uses an Atmel TS83102 chip. Although the TS83102 has been superceded by Atmel's pin-compatible AT84AS008GL, the TS83102 is no slouch in first-Nyquist high-speed digitization.

On the Neptune 2 board, the TS83102 broadband A/D converter is mated with a 1:8 de-MUX (de-multiplexer) chip, and can be optionally configured to accept AC-coupled input signals, or DC-coupled differential inputs. Independent 50? single-ended clock inputs are also provided for each channel. If a common clock is used, the board's layout ensures close phase-matching between the two channels.

The Xilinx FPGA
Two trigger inputs are also on the board's front panel, and trigger firmware is implemented in the system's Xilinx Virtex-II Pro XC2VP70 FPGA. It also interfaces the A/D converters, memories and I/O resources.

Significantly, the FPGA can also be used as a platform for your own processing subsystem, as it gives you two embedded PPC 405 processors and sixteen Rocket IO multi-Gbit/s serial transceivers. Indeed, the Rocket IO links are the principal mechanism for high speed I/O and control of the card. You get lots of realtime hooks, for sure.

Canned cores
Notably, you can implement a number of canned signal processing cores on the FPGA. Available cores include those for floating-point arithmetic, FIR (finite impulse response) filters, FFTs (fast Fourier transforms), and even complete digital receivers. TEK Microsystems and QinetiQ also offer IP (intellectual property) and developer's kits for radar and EW electronic warfare applications.

During development, a JTAG connection lets you configure the FPGA using standard Xilinx development tools such as Impact and Chipscope. Once readied, on-board flash can be programmed with the final firmware; the FPGA then configures on power-up.

Gbit reconfiguration
QinetiQ's Quixstart also supports configuration or re-configuration of the FPGA through a Gbit Ethernet link. In fact, the Neptune 2 VXS board can be set up to get a configuration from a remote server after a power-up or re-set.

This feature can be used in applications where different code runs the board in different modes. It's also for remote re-configuration or where you don't want to have data in flash for security reasons.

You also get code and an executable Windows GUI (graphical user interface) for a two-channel data capture system. This can get you up-and-running quickly while letting you verify that the hardware is operating. This application requires a PC running Windows 2000 or Windows XP, and a fiber optic Gbit Ethernet interface.

DDR memory
In terms of memory, the board is equipped with two banks of DDR (double data-rate) SDRAM that's interfaced to the FPGA. The use of DDR SDRAM lets data be read or written on both rising and falling edges of the clock.

A half Gbytes/bank is provided, with a 64-bit-wide data bus. TEK Microsystems says deeper memories (up to 1GB/bank) will be available when higher capacity memory ICs are released.

The Neptune 2 VXS also provides two SODIMM (small outline dual in-line memory module) sites. These can be fitted with DDR SDRAM modules, too, supporting 64-bit data transfers. Standard SODIMM modules up to 1GB are available, but you can purchase your own modules or specify your memory requirements when the board is configured at the factory.

Also, memory interface cores for DDR are available for the FPGA. They implement all memory control circuitry, and provide you with a simple FIFO-style interface into your application circuits in the FPGA.

So, if you need ultra-high performance analog signal acquisition, and a scalable FPGA-based architecture, check out this new board. It should lend itself well to advanced DSP applications, and is well-supported with development tools, FPGA cores and software.

- Alex Mendelsohn
eeProductCenter




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