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Synopsys expands DesignWare MSIP portfolio

Posted: 21 Dec 2005 ?? ?Print Version ?Bookmark and Share

Keywords:Synopsys? DesignWare? Mixed-Signal Intellectual Property? MSIP? DDR?

Synopsys Inc. expanded its DesignWare Mixed-Signal Intellectual Property (MSIP) portfolio with interface cell libraries to include application-specific memory I/Os designed to support DDR/DDR2 and Mobile DDR SDRAM.

The company also added a suite of standards-based general purpose I/O libraries, which can be assembled with the complementary application-specific I/O libraries to develop robust SoC interface solutions. According to Synopsys, the DesignWare Mixed-Signal I/O libraries are designed with an emphasis on signal integrity and ease of integration, enabling designers to more quickly achieve reliable, repeatable interface performance across a broad range of applications, such as feature-rich mobile handsets, digital still cameras and mobile media players.

The company added that the DesignWare Mixed-Signal I/O Libraries combine proven interface design techniques, rigorous system interconnect validation, and documented integration and system engineering support in a suite of standards-based I/O libraries to meet today's interface IP requirements.

"These memory and general purpose I/Os enable designers to develop a broad range of high-performance, reliable system interfaces for mobile, communication and computing devices," said Guri Stark, VP of marketing, Solutions Group at Synopsys. "Synopsys delivers proven connectivity IP solutions that help our customers minimize SoC design risk and improve time-to-market, while allowing SoC designers to focus their efforts on designing differentiating features for their SoCs."

The DesignWare Mixed-Signal I/O libraries, featuring the DDR2 SDRAM I/O library, are available for the TSMC 130nm G process technology.

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