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G.984-compliant transceiver features clock and data recovery

Posted: 05 Jan 2006 ?? ?Print Version ?Bookmark and Share

Keywords:Applied Micro Circuits? amcc? Gigabit Passive Optical Network? GPON? G.984?

Applied Micro Circuits Corp. entered the Gigabit Passive Optical Network (GPON) market last month when it introduced a G.984-compliant transceiver with clock and data recovery.

The S3157 is a transceiver that is designed to handle the serial transmit interface and serial receive interface in GPON equipment. It performs parallel-to-serial and serial-to-parallel conversion, clock generation, and system timing. The S3157 offers 16-bit parallel single-ended or differential LVDS I/Os with built-in termination resistors. It is designed to easily interface with standard FPGAs and ASICs.

The chip integrates a serialization/deserialization (SerDes) GPON OC-48/24/12 interface. It receives an OC-48/24/12 Non-Return to Zero (NRZ) signal and recovers the clock from the data. A high-frequency Phase-Locked Loop (PLL) on the chip performs clock synthesis, which allows the use of a slower, external transmit clock reference, according to AMCC.

The chip can be used with a 155.52MHz or 166.63MHz reference clock to support existing system clocking schemes. It integrates a low-jitter LVPECL interface that is compliant with the bit-error rate requirements of the ITU-T standards.

The S3157 is divided into transmitter and receiver sections. The sequence during the transmitter operation is a 16-bit parallel input; parallel conversion; and serial output. And during the receiver operation, it is clock and data recovery from serial input; serial-to-parallel conversion; and 16-bit parallel output.

The S3157 is packaged in a 15-by-15mm squared, 196-pin PGBA, and offers low power dissipation of 650mW.

AMCC also introduced an OC-48 transceiver dubbed the S3165 for WAN applications.

Designed to support 16-bit wide data interfaces, the S3165 device provides SerDes capabilities for low power SONET/ SDH/Gigabit Ethernet/ Fiber Channel/ HDTV/ESCON/ DTV/ D1 applications. Operational from 2.125Gbps to 3Gbps, the S3165 supports OC-48, OC-24, OC-12 and OC-3 with or without FEC; HDTV at 1.485Gbps; D1 at 1.38Gbps; Fiber Channel at 1,062Mbps; 2 x Fiber Channel at 2.124Gbps; Gigabit Ethernet at 1.25Gbps; DTV at 143.18Mbps; and ESCON at 200Mbps.

Similar to the S3157, the S3165 also features 16-bit parallel single-ended or differential LVDS I/Os and built-in termination resistors. It also uses on-chip clock synthesis PLL components.

The S3165 is packaged in a 121-pin PBGA and offers low power dissipation of 650mW. Volume production of both the S3157 and S3165 is expected to begin this quarter. Both parts are sampling and evaluation boards are currently available.

Pricing for the S3157 is less than $25 in volume, and pricing for the S3165 is $50 in 5,000-unit volumes.

- Ismini Scouras

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