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FPGAs embed secure digital I/O for faster product development

Posted: 11 Jan 2006 ?? ?Print Version ?Bookmark and Share

Keywords:QuickLogic? SDIO? secure digital input output? IP core? Eclipse II?

To help consumer electronics designers accelerate product design, QuickLogic Corp. is embedding an SDIO (secure digital input output) host controller IP core in its Eclipse II microwatt FPGAs. QuickLogic also plans to offer SDIO IP support for its PolarPro FPGAs.

The company is providing reference designs based on the QL8325 and QL8150 Eclipse II FPGAs. The SDIO reference design performs bridging and controlling functions between the Intel PXA27x embedded microprocessor and SDIO peripherals and/or SD memories.

The SDIO reference design includes QuickLogic's Mobile Applications Board (MAB) and QL8325 Eclipse II ?Watt FPGA, as well as a Microsoft Windows CE driver that are all compatible with the Intel PXA27x processor Mainstone II DVK.

The SDIO reference design is said to improve the read/write performance on SD memory cards. According to the company, it provides up to 3x performance versus the PXA27x processor's native mode at the same frequency and up to 5x at higher frequencies. The QuickLogic SDIO IP embedded in the reference design can be operated at a clock frequency of up to 52MHz compared with the SDIO specification of 25MHz.

Since the reference design can be combined with other IPs to support multiple interfaces to the Intel PXA27x processor, designers can add other peripherals functions to their system such as 802.11g (Wi-Fi) and USB using an Eclipse II FPGA.

Eclipse II FPGA devices with embedded SDIO IP are available for less than $5 in volume orders.

- Ismini Scouras

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