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New wafer-level package tech from National

Posted: 12 Jan 2006 ?? ?Print Version ?Bookmark and Share

Keywords:National Semiconductor? micro SMDxt? micro Surface Mount Device extended technology? chip package?

National Semiconductor Corp. announced the micro SMDxt (micro Surface Mount Device extended technology) chip package, its newest generation of wafer-level package technologies.

The new package, which builds on the company's micro SMD, uses a "unique" structure that enables high-reliability products with bump counts of 42 to 100 bumps at a 0.5mm pitch without any underfill. According to the press release, higher bump-count packages enable designers to create more complex products with advanced features and pack them into a smaller space.

"National leads the industry in package miniaturization for applications such as cellphones, notebook computers and other portable devices," said Sadanand Patil, VP of National's Package Technology Group. "The new micro SMDxt package offers the industry's smallest footprint and improved performance while using standard surface mount assembly and rework processes."

The press release further said that the superior electrical noise performance of the micro SMDxt package (compared to standard wire-bonded devices) makes it well-suited for high-performance mobile applications. Thermal performance of the new package is comparable to other thermally enhanced packages such as QFN or LLP packages with similar pin count. Reliability standards such as thermal cycling, thermal shock and drop test, and flex test can be met without the use of an underfill, added National.

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