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Mentor, STARC ink IC design agreement

Posted: 26 Jan 2006 ?? ?Print Version ?Bookmark and Share

Keywords:Mentor Graphics? STARC? Semiconductor Technology Academic Research Center?

Mentor Graphics Corp. announced a joint development agreement with Semiconductor Technology Academic Research Center (STARC), a research and development consortium co-founded by eleven major Japanese semiconductor companies. The joint development will focus on new at-speed delay test methodologies for IC designs that will increase outgoing chip quality levels by improving the detection of small delay defects during manufacturing test.

According to the press release, the development partnership between Mentor and STARC seeks to fulfill proposed delay defect detection requirements from STARC and its client companies by incorporating new technologies into Mentor's Automatic Test Pattern Generation IC test tools that will ensure the highest quality for tested chips.

"STARC's mission is to seek out new and effective technologies through joint research between universities and the industry, in order to achieve breakthroughs in semiconductor technologies," said Yasuo Sato, senior manager, Test Methodology Group at STARC.




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