Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > EDA/IP

austriamicro upgrades H35 design kit

Posted: 06 Feb 2006 ?? ?Print Version ?Bookmark and Share

Keywords:HIT-Kit? H35? CMOS process? cell libraries? austriamicrosystems?

austriamicrosystems' full service foundry business unit announced an upgrade of its analog/mixed-signal high performance technology design kit (HIT-Kit) for its advanced 0.35m high-voltage CMOS process H35. This kit is designed for power management products, display drivers, sensors and sensor interfaces, and automotive applications.

The HIT-Kit 3.71, which is based on Cadence version 5.1.41, includes periphery cell libraries up to 50V. It offers design utilities like the Safe Operating Area check tool, automatic layout generators for high-voltage devices and guard-ring generation, and special layout verification utilities like a leakage check feature.

The product contains a set of standard cells, periphery cells and general purpose analog cells such as comparators, operational amplifiers, and low power analog-to-digital and digital-to-analog converters.

All I/O structures within the design kit are silicon-validated and meet the military ESD and JEDEC latch-up standards. The product comes with I/O pads designed to surpass up to 4kV HBM and 250mA latch-up immunity. In C35 technology, the total I/O libraries consist of more than 1,800 cells supporting 3.3V and 3.3V/5V designs. The high-voltage CMOS process H35 with its floating libraries includes over 2,400 core and periphery cells.

Article Comments - austriamicro upgrades H35 design kit
*? You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.

Back to Top