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FMA to showcase 65nm tech at DesignCon

Posted: 08 Feb 2006 ?? ?Print Version ?Bookmark and Share

Keywords:Fujitsu Microelectronics? FMA? 65nm? DesignCon?

Fujitsu Microelectronics America Inc. (FMA) announced that it will feature its new 65nm process technology at the annual DesignCon being help in Santa Clara, California until Feb. 9.

FMA will feature a road map detailing the company's 90-, 65- and 45nm process technologies and packaging options.

"Fujitsu is applying advanced process technologies to a set of complex designs that move the networking and communications industries forward dramatically," said Keith Horn, SVP for marketing and sales at FMA. "We are leading the industry in the migration of these processes, first to 90nm and now to 65nm, which generate the high-speed, low-power, high-performance semiconductor devices required by our customers."

According to the announcement, features of the 65nm technology include 30nm gate lengths, which is 25 percent smaller than the gate size for 90nm, CS100, transistors; speeds that are 20 percent to 30 percent faster than the speeds afforded using 90nm technology; transistor density that is doubled; and SRAM cells that are only half the size of those delivered by 90nm technology. Fujitsu will start tape-out acceptance for the 65nm technology in early 2006, said the press release.

In the middle of last month, Fujitsu announced that it will construct a new fab to mass-produce logic semiconductors employing 65nm process technology and 300mm wafers. The company plans to invest more than $1 billion in the new facility by the end of March 2008.




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