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PLL targets ATCA, AMC architectures

Posted: 15 Feb 2006 ?? ?Print Version ?Bookmark and Share

Keywords:ZL30117? synchronizer? AdvancedTCA? AMC? advanced mezzanine card?

Zarlink Semiconductor launched a single-chip, ultra-low jitter synchronizer for network interface cards. The new ZL30117 synchronizer aims to solve the timing challenges posed by the AdvancedTCA (telecommunications computing architecture), advanced mezzanine card (AMC) and MicroTCA architectures.

The ZL30117 offers features for AMCs used in ATCA and MicroTCA designs. According to Zarlink, AMCs do not provide redundant timing reference inputs to support carrier-grade timing. The holdover capability of the ZL30117 chip enables it to ride out the complete loss of its incoming reference, which can occur when switching from a failed clock unit to a backup clock unit. Additionally, the ZL30117 PLL continues to operate in full compliance with network requirements for several seconds after losing its reference, allowing time for the system to provide another reference source to the AMC.

The ZL30117device accepts three reference inputs, supporting clock frequencies in any multiple of 8kHz up to 77.76MHz, as well as supporting 2kHz. This product can also directly lock to any of the standard clock input frequencies available to an AMC in an ATCA or MicroTCA application.

With a measurement of 9-by-9mm, the ZL30117 single-chip synchronizer is capable of generating <1ps rms of jitter in full compliance with OC-48 and STM-16 requirements, and consumes <0.9W of power.




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