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Outsourcing: Navigating a maze of decisions

Posted: 16 Feb 2006 ?? ?Print Version ?Bookmark and Share

Keywords:Richard Goering? chip design? outsourcing? IC design? eInfochips?

The cheapest, fastest and best way to finish your chip design may be to get somebody else to do it. A complex web of providers, both domestic and offshore, will be happy to help. But successfully outsourcing IC design takes careful planning, strong project management and a realistic set of expectations.

You can't just throw a specification or netlist "over the wall" to designers down the street, let alone in China or India, veterans say. With outsourcing, you are entering into a close partnership that will require ongoing interaction, supervision and quality control. "A partnership is like a marriage," said Pratul Shroff, CEO of design house eInfochips Ltd. "It takes time to understand each other, set expectations and get going."

In fact, the very notion of "handoff" has become obsolete, said Richard Brossart, VP of technology marketing at LSI Logic Corp. "We are engaged with customers from the beginning, and we work very closely with them throughout the design process," he noted.

Choosing an outsourcing partner may be the hardest part of the process. Fabless chip designers have essentially been outsourcing physical design for years by passing netlists to ASIC vendors. That route is still open, but today, you can also work with an independent design services provider, either domestic or offshore. Other choices include "fabless ASIC" providers like OpenSilicon and eSilicon, and large EDA vendors such as Cadence Design Systems or Synopsys.

It all adds up to a complicated ecosystem with a tangled skein of relationships. Even integrated device manufacturers and ASIC vendors frequently use third-party design houses, and design services firms may subcontract with one another, depending on areas of expertise. "There are many companies in the design services world," said Jim Gobes, CEO of design services provider Intrinsix Corp. "We may compete one day and partner the next."

In a survey conducted last year by EE Times and Electronics Supply & Manufacturing, 40 percent of the 303 management respondents said they outsource IC design. Of these, 61 percent outsource physical design. And nearly one-third of respondents from large companies, which are more likely to outsource, described outsourcing as a "net liability."

In a subsequent EE Times/Deutsche Bank EDA user survey, 39 percent of 339 chip designers who responded said their companies outsource some portion of design; 15 percent noted outsourcing of physical design. But the survey made clear that "outsource" does not mean "offshore." A full 90 percent of respondents said their companies use providers in North America, compared with 24 percent for India and 21 percent for China.

Engagement models are varied and complex. Some companies will write only a specification and outsource everything else; others will outsource a specific portion of the design, such as verification or physical design. Users might hand off a specification, RTL code, a gate-level netlist, placed gates or even GDSII if using only manufacturing services.

As feature sizes shrink, and front- and back-end designs grow increasingly interdependent, it's becoming harder to outsource only the physical design. "While there are still instances of players doing just back-end work, at 90nm and lower, the trend is very much in favor of having one single player do all the work," said A. Vasudevan, VP for VLSI at Indian electronics giant Wipro Technologies, which provides design services.

Who you gonna call?
If you're going with an independent design services company, you can probably save 30 percent to 50 percent of your costs by going offshore. So why work with a provider in North America? One reason is that there may be expertise not readily available overseas, such as analog/mixed-signal design, which has become a major focus for both Intrinsix and Integre Technologies LLC.

"If you have a well-specified project and process, and a good example is physical design of digital devices, there isn't a reason to stay onshore," said Gobes of Intrinsix. "What should stay onshore is anything interactive. Analog/mixed-signal doesn't tend to work well offshore."

"We're in this country, we're in close contact with the customer and you know who you're dealing with," said Mark Bjelwas, managing director of Integre Technologies. "If it stays domestic, you don't have to worry about your IP."

Silicon Logic Engineering Inc., whose founders came from Cray Research, specializes in high-speed, high-complexity ICs. About half of the work starts at the specification level. "My sense is that a lot of overseas companies are not as far along the technology curve as we are," said CTO Mike Berry. "They do a lot of 180nm and 130nm, but not a lot of 90nm."

Signet Design Solutions Inc. is a domestic firm that specializes in IC physical design, although the company is currently setting up a design center in Vietnam. Signet uses a "fixed-cost" model that gives the customer a predictable budget up front, said Hung Hua, president.

The main challenge with outsourcing, said Intrinsix's Gobes, is "really comprehending the true total cost and total schedule that it takes to get things done." Chip-design companies consistently underestimate what it takes, he said. The important point, according to Gobes, is to find a provider who is "willing to tell the truth."

While leading-edge chip-design projects will tend to stay in the United States, many digital IC designs can be successfully outsourced to offshore providers. But it's not an over-the-wall type of thingthere are costs and concerns that could easily offset lower wages in China or India.

Verisilicon has a U.S. office in Santa Clara, California, but most of its 150 engineers are in Shanghai. The company does front- and back-end IC design work, develops IP and will contract out manufacturing to foundries in China. A customer support team in the United States eases the time zone and language differences, said Bill Wang, general manager of Verisilicon USA. Analog design work is done in the United States, he added.

China may seem remote, but most consumer electronics ASICs are made in Asia, Wang noted. "Doing design close to where the foundry is, and where the packaging and testing are, certainly helps," he said.

On-site champions
For its part, eInfochips employs about 350 engineers, of whom 30 or 40 work in Santa Clara, California, and the rest in Ahmedabad, on the west coast of India. "What we have found is that it is very critical to have an on-site champion with the customer," said CEO Shroff. "His role is to communicate with the offshore teams in India."

The company has published 10 "mantras for offshoring." It advises customers to define project requirements well in advance, check the vendor's expertise and track record, verify IP protection and look for long-term partners. But one item that's not on the list might be even more critical, Shroff said, and it has to do with overcoming the cultural divide.

"Indian culture does not allow people to say 'no' up front, to say it can't be done or that we won't be able to deliver by deadline," Shroff said. "You have to be very careful when you communicate. That's why we have on-site champions who have been in the United States for several years."

Looking for long-term partnerships is crucial, Shroff said. "The pain of offshoring is way too high if you're just going to do it once," he said. "The management bandwidth you will need to get things going might offset the cost benefit."

Time difference
QualCore Logic Inc. has about 30 engineers in Sunnyvale, California, and 200 in Hyderabad, India. The company works mostly at 130nm and 180nm and also offers IP development and PCB design. "The No. 1 concern," said George Attokaran, director of design services, "is that India is 12-13hrs ahead of U.S. time." Thus, QualCore has program managers in the United States so customers don't have to deal with the Indian office directly, he said.

Keith Vertrees, VP of engineering at wireless provider Vativ Technologies Inc., said his company has done a half-dozen chip designs, all successful, with QualCore. Vativ handles everything up to placed gates and turns the rest over to QualCore. "One thing about QualCore is that they have a very good project manager here in the States on our time," Vertrees said. "I can't imagine it working without that."

Handing off a chip design takes work, he noted. "Some of the first chips we did had pretty sloppy constraints and were too aggressive," he said. "The key is to make sure the constraints you give them are real." Vativ said he's also found it crucial to have a good floorplan before handing over designs for final routing.

Upfront planning and realistic constraints will help avoid iterations between physical and front-end design. Iterations are the key challenge in offshore outsourcing of IC physical design, said Wipro's Vasudevan. To minimize iterations, Wipro has a well-defined flow to validate incoming library, netlist and constraint quality, he said.

- Richard Goering
EE Times

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