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Philips implements SoC in 65nm CMOS

Posted: 08 Mar 2006 ?? ?Print Version ?Bookmark and Share

Keywords:SoC? system-on-chip? ARM1176JZF-S? processor? 65nm?

Philips announced that it has implemented a right-first-time 65nm SoC with the design complexity required in next-generation mobile multimedia and home entertainment products such as 3G cellphones and LCD TVs.

Featuring an intelligent energy manager (IEM) technology-enabled ARM1176JZF-S processor, 512Kbytes of low-power scratch-pad memory, communication ports and analog IP blocks, the new chip is said to be the first truly consumer-product oriented SoC to be produced in 65nm low-power CMOS.

The Philips SoC features a 65nm CMOS implementation of an ARM1176JZF-S processor, chosen because of its enhanced TrustZone security technology and IEM low power features. Low power by design was a requirement for the chip because of the need to simultaneously meet the performance, complexity and power consumption requirements of battery-powered applications such as cellphones and portable media players. The chip also utilizes several other low-power features such as the division of critical circuitry into voltage islands.

Extensive testing has already seen the SoC booting and running Linux, which is said to be gaining favor in the consumer electronics market due to its modularity, scalability, open-source philosophy and low-cost development tool support.

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