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Initiative launched to accelerate FPGA system level design adoption

Posted: 20 Mar 2006 ?? ?Print Version ?Bookmark and Share

Keywords:Xilinx? ESL Initiative? FPGA?

Xilinx Inc. launched the ESL Initiative, a multi-faceted program aimed at making ESL design methodologies and tools more accessible to programmable system designers.

The initiative expands collaboration across the ESL supply chain to better integrate and optimize ESL tool flows for both hardware designers and software programmers targeting Xilinx FPGAs. Initial participants include Bluespec Inc., Celoxica, CriticalBlue, Impulse Accelerated Technologies Inc., Mitrionics Inc., Nallatech, Poseidon Design Systems Inc., SystemCrafter and Teja Technologies.

The ESL Initiative underscores the commitment by Xilinx and ESL tool providers to drive technological innovation and development of practical solutions that deliver on the full potential of this high-level design methodology. The initiative has identified four key areas of focus: improve ease of use to further simplify and abstract the details associated with FPGA design; optimize support for Xilinx embedded PowerPC and MicroBlaze processor solutions; improve the quality of results with high level language synthesis tools; and establish common standards for FPGA ESL tool interoperability.

According to the company, technical collaboration will be backed by cooperative marketing and educational programs to evangelize and promote the capabilities, strengths and benefits of FPGA ESL solutions.

"Ensuring that all designers can readily access the benefits of programmability is fundamental to our vision for the industry, and ESL is an important convergence point for addressing the methodology and tool requirements of both hardware designers and software developers," said Wim Roelandts, president and CEO of Xilinx.

ESL is an emerging design methodology that allows designers to work at higher levels of abstraction than typically supported by register transfer level and gate level hardware descriptions. ESL tool development to date has primarily focused on the design of hard-wired devices such as ASICs and ASSPs.




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