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Mobile phone chip interface gets real

Posted: 03 Apr 2006 ?? ?Print Version ?Bookmark and Share

Keywords:Rick Merritt? cellphone? consortium? Mobile Industry Processor Interface? MIPI?

A cellphone consortium developing serial chip interfaces has lifted the veil on its road map at a time when its initial specifications are beginning to appear in silicon. The 90-member Mobile Industry Processor Interface (MIPI) Alliance is building momentum, although observers foresee many hurdles in a long transition from today's proprietary parallel technologies.

MIPI plans to release interfaces for displays, as well as for audio and power-management chips and other peripherals, this year. In 2007, the group says it will roll out a PHY interface that busts far beyond the Gbps barrier.

Formed in July 2003 by ARM, Nokia, STMicroelectronics and Texas Instruments, MIPI aims to shave complexity and costs while boosting flexibility for cellphones and the chips that drive them. Last November, the group released its first spec, an interface for camera-phone imagers that Micron Technology Inc. used in a 2Mpixel CMOS sensor announced recently.

Micron would not make any specific commitments on future products using MIPI's Camera Serial Interface, while it waits for application processors and systems designs using CSI to emerge.

Nevertheless, MIPI interfaces "have a lot of legs" for the long-term shift toward standards, said Suresh Venkatraman, director of technology strategy for Micron's imaging group. "It's difficult to put a timeline on a transition, but you are probably looking at three to four years," he said.

Cellphone makers today face as many as five competing and proprietary PHY interfaces for any given system function. MIPI aims to reduce that to two to four PHY standards, with multiple protocols layered on top to cover various functions, all geared to last for five to 10 years.

Some relief
The standards mean "a big headache becomes a small headache," said MIPI chairman Tom Vial, an alliance manager for Texas Instruments Inc. "This frees up engineers to work on other things, and creates less churn for the industry. Systems companies get better interoperability and more flexibility in their choice of chip vendors."

"We are already designing in quite a few of the MIPI interfaces," said Boris Bobrov, a marketing manager for multimedia applications in the wireless group at Freescale Semiconductor Inc. "We see a lot of progress in their camera, display and audio interfaces and are looking at implementing those first."

Standard interfaces, said Bobrov, make "our customer's life easier in choosing and switching between solutions." And the effort makes "our life easier in working with different suppliers."

MIPI's initial foundation is what it calls D-Phy, a serial interface released in November that will be the basis for its camera, display and universal interfaces. D-Phy supports as many as four lanes at rates of up to 1Gbps per lane, based on a 1.2V, source-synchronous scalable low-voltage signaling technology using a 200mV swing.

"I think you'll see many implementations at 600-800Mbps per lane," said Vial.

MIPI also released CSI last November as a protocol geared for imagers that rides on top of the D-Phy. The group chose the existing Compact Camera Port 2 interface of the Standard Mobile Imaging Architecture Forum as the starting point for CSI, then significantly modified it.

In mid-March, the group released a Display Serial Interface protocol for D-Phy, supporting any display type with resolutions of up to XGA (1,024pixel x 768pixel).

"The display and camera interfaces were the low-hanging fruit," said Vial. "The existing interfaces were fragmented, proprietary and didn't scale well, so it wasn't difficult to get people to agree on the need for a standard there."

Indeed, even companies backing competing effortssuch as the Mobile Video Interface (MVI) defined by Epson and Renesas, and National Semiconductor Corp.'s Mobile Pixel Link (MPL)see the MIPI specs as a primary direction for the future.

Only one or two handsets on Japan's Docomo network are using chips with the MVI interface today, according to an Epson spokesman.

National, for its part, plans future enhancements to the 16bit and 18bit versions of MPL. "We are committed to a road map for MPbut MPL is not our long-term goal," said Jim Schuessler, a senior technology marketing manager for National Semiconductor.

"I don't see any reason the industry will not converge on MIPI," Vial said.

D-Phy protocol
Later this year, MIPI will release its so-called Unified Protocol or UniPro for the D-Phy. It is aimed at linking a wide variety of peripherals that require high bandwidth, including TV receivers and Wi-Fi devices.

UniPro has the potential to act as a single protocol covering cameras, displays and other systems, but it is still so early in its development that neither Micron nor National would make commitments to it. UniPro's "goals are broad and general, and if it can deliver on them, it will be very beneficial," said National's Schuessler.

MIPI has two other interfaces in the works for 2006: the Serial Low-power Interconnect for Media or SLIMbus and a serial interconnect for power-management ICs.

The SLIMbus uses a separate, non-differential PHY that runs at rates of 50Mbps or slower over just one lane. It aims to replace today's I2C and I2S interfaces while offering more features and requiring the same or less power than the two combined. SLIMbus is "first and foremost an audio bus," said Schuessler, who chairs the SLIMbus working group.

However, it is also suitable for Bluetooth and any control devices, he noted.

The working group has about 25 active members and is open to new ones, Schuessler said, but warned that "the concrete on the spec is hardening fast."

The group is still debating whether the power-management spec will use the SLIMbus PHY or require its own PHY. It will certainly have its own protocol for sharing power-related data.

Power management "is one of the major design challenges in cellphones, but also one of the major product differentiators," said Vial. "So it's a ripe area for standards, but also a highly sensitive one. Drawing a line between what should be standard and what is proprietary differentiation has been difficult and not without healthy debate."

Because major chip providers supply both the applications processors and power-management ICs, they have been slow to see the need for standard interfaces between them. However, that is changing as those interfaces become more complex and incorporate new features, such as dynamic-voltage scaling, said Bobrov of Freescale.

Looking to 2007, MIPI plans to work on M-Phy, a spec that aims to bust through the Gbit barrier by using embedded clocking techniques. The existing camera, display and other protocols will be able to ride on top of this spec.

Separately, MIPI has spun out work on a memory interface to a new group still in stealth mode. Internally, MIPI is still working on an API for the various types of memory chips used in cellphones. It is also developing standards for cellphone debug and test as well as a handful of software-oriented standards, Vial said.

The MIPI specs are available royalty-free to members. Membership dues for the non-profit organization range from $3,750 to $37,500, depending on the size of the company and the membership level.

- Rick Merritt
EE Times

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