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Hisilicon adopts Synopsys' Galaxy design platform

Posted: 06 Apr 2006 ?? ?Print Version ?Bookmark and Share

Keywords:Synopsys? Hisilicon? Galaxy Design Platform? 130nm designs?

Synopsys Inc. announced that Hisilicon Technologies has adopted Synopsys' Galaxy Design Platform as its primary IC design flow for 130nm designs.

According to the press release, a major competitive challenge faced by Hisilicon is to reduce the power consumption of its advanced, high-speed designs. Synopsys' Galaxy platform provides Hisilicon with the most comprehensive low-power solution and enhances their low-power design capabilities.

"Low-power design is definitely the critical constraint on today's IC designs for consumer electronic applications, and also a determining factor of every project's success," said Ai Wei, senior vice president of Hisilicon. "Using Synopsys' Galaxy low-power flow throughout the entire design process, from RTL to GDSII, we are able to address the low-power challenge of today's strong market pressure."

Hisilicon's design implementation flow is based on Synopsys Galaxy products, including Design Compiler RTL synthesis solution, JupiterXT physical planning solution, Physical Compiler and Astro physical implementation solutions, Power Compiler multi-voltage power management solution, Star-RCXT parasitic extraction solution, and PrimeTime SI static timing sign-off solution.




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