Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > EDA/IP

IC design flow integrated

Posted: 17 Apr 2006 ?? ?Print Version ?Bookmark and Share

Keywords:richard goering? ee times? pilot design environment? synopsys? discovery verification suite?

At first glance, the Pilot Design Environment from Synopsys Inc. may sound like a resurrected EDA framework from the late 1980s. But Synopsys claims to be taking a fresh approach with this integrated RTL-to-GDSII design system, sold as a customized offering by Synopsys Design Services.

Pilot works with Synopsys' Discovery verification suite and Galaxy IC implementation suite, but is sold apart from the tools. It adds customized scripts, a GUI for project setup and flow configuration, metrics monitoring and reporting, and various utilities that help provide an integrated design flow.

"The framework initiative tended to be an all-encompassing infrastructure that, in many cases, abstracted the underlying tools," said Glenn Dukes, VP of Synopsys Professional Services. "We haven't done that at all. We've built on open standards to deliver a robust, capable design flow that's very extensible."

Pilot is delivered as a services offering with source code, letting users edit scripts or create new scripts. That allows customers to plug in internal or third-party tools. Dukes noted that Synopsys has used Pilot internally for about four years and has deployed it to about a dozen customers.

Many Synopsys customers already have their own design environments and scripts, but those undergoing changes may be receptive to Pilot, Dukes said. "The greatest demand is when customers move from multivendor flows to a single-vendor or dominant-vendor design system, which they're doing increasingly at 90nm or 65nm," Dukes said.

Synopsys expected the primary demand to come from fabless IC providers, but has been surprised at the response from integrated device manufacturers (IDMs), Dukes said. One IDM, he noted, used Pilot as a starting point for its own 65nm development platform.

While Pilot can include front-end tools, the greatest value is for customer-owned tooling environments where designers are going all the way to GDSII, Dukes said. It doesn't specifically include electronic system-level design tools, but the same scripts and flows could be applied to them, he said. And that's one way in which Synopsys Design Services can help customize the offering.

Pilot is a services offering, Dukes said, because it needs to be tailored to each customer's design infrastructure. Customers often need help integrating external tools or setting up revision control, he said. "Since we're shipping source code, we need to make sure customers really understand it, so they don't edit themselves into an unsupportable situation," he said.

Pilot claims to offer a modular, reusable flow for use in multiple projects. It supports flat and hierarchical designs and has built-in methodologies to address such issues as timing, signal integrity, power, design-for-test and design-for-manufacturing. Support is included for the latest Synopsys tools such as IC Compiler.

Also included with Pilot is a set of source-code TCL scripts that invoke tools and execute series of commands. Scripts also check the completeness of setup files and create all the technology files that the tools need throughout the flow.

It's through the scripts, Dukes noted, that users would determine tool selection and bring in third-party tools. For example, Synopsys Design Services uses Hercules for metal fill. But Pilot users could choose to do metal fill in Synopsys' Astro product, an internal tool, or Mentor Graphics Corp.'s Calibre. In such a case, Dukes said, Synopsys would suggest setting up a separate script for the metal flow, rather than editing the original source script.

The GUI does not replace the user interfaces for individual tools, nor does it "attempt to be a big GUIlike a framework," Dukes said. "It's really a setup-and-configuration GUI."

Pilot also monitors some 50 metrics, including pass/fail status for all tests and progress on meeting timing, area or power constraints. This, said Dukes, gives users a "clear snapshot" of where they are.

The tool suite also tracks resource-related metrics, such as EDA tools and versions, CPU and disk usage, and number of users. This helps identify bottlenecks in the flow and aids in decisions such as whether or not to use the distributed-processing capabilities available in tools such as Hercules.

Dukes noted that Synopsys has leveraged these metrics to track design productivity by looking at the amount of time engineers put into various design phases. Synopsys Design Services has been able to improve its productivity by about 30 percent per year, Dukes said. The improvement is higher for lower-complexity circuits and lower for high-complexity circuits, which typically require more manual design.

Pilot is available now. Deployment costs vary widely, Dukes said, and a support offering sells for $75,000 per year.

- Richard Goering
EE Times

Article Comments - IC design flow integrated
*? You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.

Back to Top