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Intel Core ups ante in battle with AMD

Posted: 17 Apr 2006 ?? ?Print Version ?Bookmark and Share

Keywords:Dave Bursky? Intel? Core microarchitecture? Intel Developer Forum? IDF?

Like proud fathers showing off pictures of their newborns, top executives at Intel Corp. exuberantly unveiled details of the company's Core microarchitecture at the recent Intel Developer Forum held in San Francisco. The new architecture, which represents a complete revamping of almost every aspect of the well-established Pentium to optimize for power and performance, will give rise to processors designed to regain ground for Intel in the CPU war with archrival Advanced Micro Devices Inc.

"This isn't just a minor rethinking of the Pentium microarchitecture. This is a major leap," said Pat Gelsinger, VP and general manager of Intel's Digital Enterprise Group. "We haven't had such a major leap in microarchitectures since we introduced out-of-order" execution.

Intel expects the new architecture's deliverable performance will be substantially higher than anything a competitor could offer later this year, Gelsinger said.

The new architecture is crucial if Intel is to maintain its market share in the face of strong competition from AMD, said Tony Massimini, chief of technology for micrologic at Semico Research Inc. Intel has lost several market share points over the past year, as AMD's dual-core CPUs have made inroads into the server and desktop markets. According to Dean McCarron, principal analyst at Mercury Research, AMD's share in processors topped 18 percent in 2005, up from 14.9 percent in 2002 and almost 16 percent in 2004. In those same years, Intel's share declined by similar deltas. However, "Core goes a long way toward meeting market needs," McCarron said.

The laptop, desktop and server CPUs based on it!codenamed Merom, Conroe and Woodcrest, respectively!will deliver higher performance at lower power levels, in theory, surpassing the marks set by the AMD dual-core processors. The microarchitecture "seems to perform well using benchmarks Intel itself defined, but we won't know for sure until it gets out in the field," said McCarron. Indeed, he said, the improvements are the most significant he's seen from Intel since the early Pentiums. "It definitely moves the company back into a competitive position," McCarron said.

For its part, AMD probably won't pull any rabbits out of the hat to counter the Core architecture momentum this year, according to Nathan Brookwood, principal analyst at Insight 64. "However, don't count them out as they bring on their next generation in 2007," he said.

Pipeline depth
The streamlined 14-stage pipeline in the Core microarchitecture eliminates some of the performance penalties of the deeper, 20-plus-stage pipelines found in today's Intel processors, said Brookwood. According to McCarron, the depth of the pipeline has been one of the chief differentiators between AMD and Intel in recent processor iterations, with Intel preferring a deeper pipeline to achieve more instructions per clock cycle. But deeply pipelined processors are prone to pipeline flushes due to interrupts, mispredicted branches and other causes that negatively affect performance, so the shorter pipeline on the Core microarchitecture should help improve overall performance.

The other big differentiator between the companies, said McCarron, is in the placement of the memory controller. AMD puts it on-chip, while Intel keeps it off.

AMD has already delivered performance improvements this year!with more on tap for later in 2006, said Margaret Lewis, director of commercial solutions at AMD. Recently, for example, the company released three new members of its dual-core Opteron family that deliver the best performance and power combination to date. The Opteron 885, 285 and 185!targeted at eight- to 16-way; four- to eight-way; and one- to two-way servers, respectively!will run about 10 percent faster than previous devices (now at 2.6GHz). But thanks to process adjustments, they will not consume more power than their predecessors, holding steady at about 95W, AMD said.

The 885 and 285 will compete today with Intel's dual-core Xeon processors, which have higher power envelopes. And by the time Intel's Woodcrest series is ready in 2007, AMD will probably have a new version of the Opteron ready to go toe-to-toe with it. The 185 Opteron will also compete with the Xeon for the low end of the server market. But it will do battle as well with Intel's forthcoming Conroe, which is optimized for high-performance desktop systems, replacing the Pentium-D.

A bigger performance boost, said AMD's Lewis, will come in the second half, when the dual-core Opterons will be updated to include second-generation double-data-rate DRAM controllers. The embedded DDR2 memory interface will deliver higher memory bandwidth without the need to increase the speed of the front-side bus to 1.333GHz, as Intel will do on its first Core microarchitecture CPUs. That will also lower the power consumption a bit, since the DDR2 interface consumes slightly less power than the DDR1 interface even though it runs faster.

The Core architecture essentially revamps almost every aspect of the internal workings of the Pentium microarchitecture, said Intel fellow Justin Rattner, director of the Corporate Technology Group. The changes, he said, will allow the forthcoming processors to deliver major performance gains at power levels considerably lower than in current-generation processors. Additionally, Intel plans to use the Core microarchitecture across all future members of its X86 processor families, from portable systems to professional desktops to servers, providing software developers with a consistent programming model that will allow them to develop one software implementation that can run across the full range of processor platforms. "We're now seeing a fairly broad convergence of Intel's processors around this architecture by year's end," said analyst McCarron.

Memory allocation
The Core architecture will initially find its way into the laptop market in the form of the Merom. This chip will incorporate two cores, each based on a 14-stage, 128bit-wide pipeline that can handle four 32bit instructions per cycle. Expected to replace the Core Duo processor now used in laptop systems, the Merom will deliver about 20 percent more performance, according to Intel. The two cores on Merom share an L2 smart cache of up to 4Mbytes, and that memory can be dynamically allocated between the cores. That will allow each core to have the optimal amount of cache, thus improving program execution efficiency, Rattner said.

To better handle media-processing applications, Intel revamped the SSE instructions so that all of them execute as single-cycle commands. In previous CPUs, many of the SSE instructions required two cycles. Also, a new scheme developed at Intel's labs allows programmers to combine pairs of micro-operation instructions into single instructions, thus reducing the number of execution cycles, Rattner said. Referred to as MacroFusion, the technique can improve execution efficiency, thus improving the overall performance of many programs.

In all its forthcoming processors, Intel has paid considerable attention to reducing active and standby power. The Core microarchitecture includes many power-management schemes and fine-grained control of the many blocks on the chips to minimize power consumption in both the active and idle states. "Intel is promoting it as a 40 percent performance improvement with a 40 percent reduction in power," said McCarron of Mercury Research.

The forthcoming Woodcrest processor for the server market will have a top power draw of just 80W, and a low-voltage version promises 40W maximum. Such power levels are about 35 percent lower than those of current-generation Xeon processors and are even lower than the current crop of AMD Opteron chips. Since the Woodcrest chips won't be available until 2007, however, AMD has some time to refresh its Opteron designs.

For the performance desktop market, the Conroe processor is promising maximum power of 65W, about 30 percent lower than today's Pentium-D, while touting about 40 percent better throughput. It will come in versions with either a 2Mbyte or 4Mbyte intelligent cache. Samples are expected late this year.

Intel is also offering power reductions by means of a self-refreshing display scheme for laptops that eliminates the need for the graphics controller and display subsystem, Rattner said. By combining this self-refreshing display technology with a revamped OS that wakes the system only when the display changes, system power is reduced.

With both Intel and AMD tweaking power and performance, "we're seeing a shift to what matters, such as sensitivity to power consumption and noise," said McCarron. "Both companies have changed their product line to be more in line with market demand." As a result, he said, "both will see market improvements."

- Dave Bursky
EE Times

Additional reporting by Patrick Mannion

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