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Cadence, SMIC co-develop AMS reference flow

Posted: 19 Apr 2006 ?? ?Print Version ?Bookmark and Share

Keywords:Cadence Design Systems? Semiconductor Mfg International? SMIC? analog mixed-signal? AMS?

Cadence Design Systems Inc. and Semiconductor Mfg International Corp. (SMIC) have jointly developed an analog mixed-signal (AMS) reference flow to address the needs of designers developing ICs for the consumer, networking and wireless markets.

The block-level reference flow is based on SMIC's 0.18?m multi-mode, radio-frequency process design kit (PDK) and the Cadence Virtuoso custom design platform and Design for Manufacturing (DFM) technologies. The flow has been proven through silicon and package validation of a sample analog-to-digital converter design According to the press release, the flow improves designer productivity by providing a reference design environment, baseline flow and an example design demonstrating how designers can use SMIC process technology and the Cadence Virtuoso platform.

"Our collaboration with Cadence helps to drive our goal of continuing to enable the Chinese semiconductor market," said Paul Ouyang, vice president of design services at SMIC. "As a leader in analog mixed-signal design solutions, Cadence has provided its unique technology and expertise to create this reference flow. This solution will help to facilitate analog mixed-signal design for the growing consumer, networking and wireless markets."

"Cadence and SMIC aim to continue collaborating on improving designers' productivity by focusing on mainstream and advanced process technologies," said Mike McAweeney, vice president of business development of industry alliances at Cadence. "Cadence has a strong worldwide foundry access team that works with leading foundries to develop PDKs and reference flows that enable customers to speed up product development cycles and reduce design failure risks. The AMS reference flow is a result of the continuing efforts of Cadence and SMIC to ensure customer success through collaboration."

The SMIC-Cadence analog mixed-signal reference flow, based on OpenAccess 2.2, the industry open database standard, provides designers an optimized and predictable schematic-to-GDSII flow. The flow provides a starting point for design teams creating SoCs or putting together a flow of their own. The flow incorporates several Cadence technologies, including Virtuoso Spectre Circuit Simulator, Virtuoso UltraSim Full-chip Simulator, Virtuoso Schematic Editor, Virtuoso Analog Design Environment, Virtuoso Specification-driven Environment, Virtuoso Chip Assembly Router, Virtuoso XL Layout Editor, Assura Design Rule Checker (DRC) / Layout vs. Schematic (LVS) Verifier and Cadence QRC Extraction.




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