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Nanotransistors ripe for CMOS

Posted: 01 May 2006 ?? ?Print Version ?Bookmark and Share

Keywords:IBM? nanotube? transistor? CMOS? XX?

IBM Corp.'s T.J. Watson Research Center has crafted an experimental IC that uses a single-molecule nanotube as the common transistor channel for five CMOS-like inverters wired as a ring oscillator. The fully-integrated device, which reportedly runs 400,000 times faster than the fastest nanotube-based circuits developed at other labs, could serve as a blueprint for integrating nanotube transistors into production CMOS chips.

Experimental methods of adding nanotube-based transistors to standard CMOS circuits have been tried at IBM and elsewhere, but all have had to fall back on manual manipulations with an atomic-force microscope or resort to exotic processing steps. But the new work demonstrates that fully-integrated circuits are possible by growing nanotubes in place on a standard silicon substrate and then adding metallization layers using standard photolithographic techniques. It also demonstrates that standard CMOS circuitry can be crafted with the nanotube serving as the channel for both p- and n-type transistors.

The work builds on an achievement declared in 2001, when IBM demonstrated the use of nanotubes to enable a transistor channel measuring 15? (1.5nm)over 40 times smaller than the tiniest features on today's 65nm silicon ICs. The ring oscillator experiment "was a difficult project, with many troublesome process steps, but the performance we gained was better than anyone else has achieved before," said Phaedon Avouris, an IBM fellow and manager of the Nanometer Scale Science and Technology program at the T.J. Watson center. "A ring oscillator is the standard way of learning how to optimize a new IC process. We are characterizing the use of nanotubes as an electronic material in real ICs."

Using single-molecule nanotubes for each device on future ICs could simplify manufacturing and provide the kind of rigorous consistency needed to adapt commercial CMOS processes for use with carbon nanotube transistors, Avouris said.

Positive development
The IBM work is "a positive development, as we have moved nanotubes from the transistor to the circuit level, which enables the industry to begin looking at the system level," said Dean Freeman, research director for Gartner Dataquest.

Earlier efforts to build working circuits from carbon nanotube transistorsincluding projects at Stanford University and the Netherlands' Delft University of Technologyfailed to achieve full integration, instead requiring external wiring to connect the devices into a circuit. As a result of the mismatch between the current-driving capabilities of the tubes' nanoscale channels and those of the millimeter-scale cable, the performance of prior attempts topped out at 200Hz.

At 80MHz, the IBM device's performance "is not state-of-the-art yet," Avouris said. "But we know how to get there from here because all that remains are engineering problems."

"We think that all we have to do is optimize our current design to get perhaps half-a-gigahertz performance," said Joerg Appenzeller, a member of the technical staff at the T.J. Watson center. "And we already have plans on how to change our design to achieve hundreds of gigahertz."

According to IBM, the limiting factor is not the nanotube, which can switch at up to 1THz (1,000GHz), but the parasitic capacitance that results from the more than 300x size difference between the 15?-wide nanotube and the 500nm-wide electrodes that connect to it.

"For the signal to propagate from inverter to inverter, it had to charge the relatively large capacitance of the gate," said Avouris. That limited performance. "But we know how to make the parasitic capacitance smaller by shrinking the electrodes, and we are re-engineering the basic carbon nanotube transistor design for ultralow parasitic capacitance."

IBM estimates that it will be 10 years before it has fully optimized the process for use with standard CMOS chips. By 2016, however, the International Technology Roadmap for Semiconductors predicts CMOS features will have shrunk below 20nm, lessening the mismatch between silicon feature sizes and carbon nanotubes.

A ring oscillator wires an odd number of inverters in series and then connects the last inverter's output back to the input. Given the odd number of inverters, the output state will be the opposite of the input state (1 or 0), thus creating an unstable circuit that will run at the fastest speed possible for the given design and process technology.

The inverters make up complementary n- and p-type transistors, gates wired together as the input, drains as the output; the sources of the n- and p-type transistors, respectively, are wired to the supply's negative and positive voltages. When a positive voltage is input to the inverter, the p-type transistor turns off and the n-type turns on, inverting the input to a negative voltage, which is fed to the next inverter.

IBM's first design challenge was learning how to craft n- and p-type nanotube transistors, a feat it touched on recently when it described the unusual operating regions possible with nanotubes. IBM had previously reported doping nanotubes to make n- and p-type devices. But its new method dispenses with doping, instead harnessing the nanotube transistor channels' unusual operating regions compared with those of silicon.

A silicon transistor has a sigmoid transfer function, staying off for voltages around zero, but either ramping up for voltages above zero (p-types) or ramping down for negative voltages (n-types). And when turned on, a silicon transistor saturates at a fixed voltage above or below zero.

Nanotube transistors, by contrast, have a V-shaped transfer function, and turn off for zero voltage and on for voltages either above or below zero.

So instead of doping the nanotubes to make p- and n-types, IBM used different metals for the gate electrodespalladium for p-types and aluminum for n-types. That shifted the "zero" point of each transistor's V-shaped transfer function so that their "zero points" were about 0.7V apart, making the transfer functions look like a "W," with the center branches overlapping when plotted. The researchers then used the region above where the two Vs crossed to get traditional n- and p-type transfer functions from the same underlying carbon nanotube channel.

"We used the p-branch of the W for one transistor and the n-branch for the other transistor," Appenzeller said. "That is the heart of what I am really proud of. It's how we avoided having to dope our nanotubes."

The second major obstacle IBM had to overcome was how to use a nanotube measuring only about 15?-wide and 6?m long as the channel for all five CMOS inverters of the ring oscillator. By using a single-molecule nanotube whose characteristics were uniform along its entire length, IBM was able to sidestep the problems that have foiled previous attempts to create nanotube-based ICs.

Collaborating with Avouris and Appenzeller were Zhihong Chen, Yu-Ming Lin and Paul Solomon, all members of the technical staff at IBM's T.J. Watson center; Florida researchers Jennifer Sippel-Oakley and Andrew Rinzler; and Columbia's Jinyao Tang and Shalom Wind.

- R. Colin Johnson
EE Times




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