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Xilinx unveils 65nm FPGAs

Posted: 18 May 2006 ?? ?Print Version ?Bookmark and Share

Keywords:Virtex-5? FPGA? Xilinx?

Xilinx Inc. announced its new Virtex-5 family of FPGAs, which is built on 65nm triple-oxide technology, ExpressFabric technology and advanced silicon modular block architecture.

The company claims that Virtex-5 FPGAs perform 30 percent higher speeds and 65 percent increased capacity over 90nm FPGAs while reducing dynamic power consumption by 35 percent and consuming 45 percent less area.

According to Wim Roelandts, Xilinx chairman, president and CEO, the FPGAs are deployed in applications such as networking and telecom infrastructure to wireless base stations and multimedia/video/audio applications.

Among the features of the Virtex-5 FPGAs include: hardened IP blocks tuned to 550MHz incorporate 36Kbit dual-port BRAM/FIFO blocks with ECC option, clock management tile with PLLs in addition to DCM/PMCD, and a DSP48E block with enhanced multipliers; Sparse Chevron packaging technology, which is said to allow up to 1,200 user I/Os; up to 330,000 logic cells; and SPI and Byte-Wide Peripheral Interface configuration modes.

Currently shipping, Virtex-5 LX is designed for high performance logic. FPGAs due in the second half of 2006 are Virtex-5 LXT, which is intended for high performance logic with serial connectivity, and Virtex-5 SXT for high performance DSP with serial connectivity. Virtex-5 FXT targets embedded processing with serial connectivity, and are due in the first half of 2007. Early access software for Virtex-5 FPGAs is currently available, with general availability in June 2006.




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