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DSP core, platform for wireless apps

Posted: 18 May 2006 ?? ?Print Version ?Bookmark and Share

Keywords:CEVA-X1622? CEVA-XS1102? DSP core? system platform? CEVA?

CEVA Inc. introduced the CEVA-X1622 DSP core and the CEVA-XS1102 system platform, which are latest additions to its CEVA-X family of DSP cores and platforms. These DSP offerings target 3.5G/HSDPA handsets, WiMAX/WiBro terminals and smart phones.

CEVA-X1622 is a low-power, synthesizable DSP with configurable memory size (64Kbytes or 128Kbytes) and configurable memory bank organization in two or four blocks. It is said to have a reduced gate count compared to other CEVA-X family members.

The CEVA-XS1102 is a DSP system platform built around the CEVA- X1622 DSP core, and includes additional peripherals and system interfaces. CEVA-X1622 offers backward code compatibility to the CEVA-X1620 DSP.

The DSP core features a 16bit fixed-point dual-MAC (medium access control) VLIW architecture combined with single-instruction, multiple-data multimedia operations, up to eight instructions executed in parallel, variable instruction widths (16bit or 32bit) and 4Gbytes of byte-addressable memory space. Numerous multimedia instructions and mechanisms built into the CEVA-X architecture enable the processor to accelerate advanced video compression standards.




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