Processor array targets embedded designs

IntellaSys Corp. announced its Scalable Embedded Array (SEA) line designed to launch multicore processor products for next-generation embedded applications. Designated the SEAforth product family, the chips feature up to 24 core processors, each of which can operate at 1BIPS. The SEAforth-24 chip dissipates 150mW in a typical application.

Combining a 6 x 4 array of 18bit processors, the SEAforth-24 chip uses a dual-stack architecture that is both asynchronous and scalable. Capable of directly driving an antenna, the SEAforth-24 eliminates the need for external data converters. On-chip features include: 512 words each of RAM and ROM on each core, flash memory interface, static/dynamic RAM interface, real-time clock support in each core, 18bit ADC and 9bit DAC, 11 SPI ports (which can double as I²C, I²S and USB ports), 32 parallel I/O lines with handshaking, and scalable connectivity among multiple SEAforth-24 chips via high-speed I/O ports.

Assembled and tested in a 240-pin BGA package, the first SEAforth-24 chips will begin shipping in Q4 of 2006 and will be priced at $19.95 each in 1,000-unit quantities.

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