XtremeData picks Altera FPGAs

Altera Corp. announced that XtremeData Inc. has chosen Altera's Stratix II FPGA device for their XD1000 FPGA co-processing solution. The XD1000 FPGA module is pin compatible with the AMD Opteron processor. The coprocessor module includes the Altera Stratix II EP2S180 FPGA and a HyperTransport bus.

XtremeData has packaged the Stratix II EP2S180 device onto a credit card-sized board that fits into the secondary CPU sockets of any 2P or 4P AMD Opteron processor-based motherboard. The XD1000 supports tight board-height form factors, including 1U servers, server blades and Advanced Telecom Computing Architecture platforms. The XD1000 includes multiple HyperTransport interfaces that are 16bits wide running at 3.2Gbps. It also features a 128bit-wide DDR333 memory interface, up to 8Mbytes of SRAM and 32Mbytes of flash memory. XtremeData said it has several next-generation variants of XD1000 planned for future release.

XtremeData used Altera's SOPC Builder system integration tool and the Nios II soft-core CPU to develop the XD1000. The XD1000 uses a HyperTransport bus to achieve low-latency communication with the host AMD Opteron processor. This means that the traditional latency chain of CPU-to-north bridge-to-south bridge (via PCI interface)-to-FPGA has been reduced to a point-to-point CPU-to-FPGA link.

The XtremeData co-processing development system includes a 2P AMD Opteron processor-based PC with an XD1000 coprocessor module, a reference design containing HyperTransport and DDR interfaces and a JTAG download cable for configuring the FPGA and probing internal FPGA signals using Altera's SignalTap II embedded logic analyzer.