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45nm CMOS LSI targets next-gen supercomputers

Posted: 22 Jun 2006 ?? ?Print Version ?Bookmark and Share

Keywords:NEC? NEC Electronics? 45nm node? CMOS circuit module?

NEC Corp. and NEC Electronics Corp. have developed a 45nm node CMOS basic circuit module with the latest high-performance Cu/low-k multilevel interconnects. According to the companies, the product's basic circuit operation possesses high-speed 5GHz-clocked LSI operation potential at low-voltage (0.9V), achieving doubled device integrity and 20 percent power savings compared to conventional 65nm-node LSIs. The product realizes a high-speed and low-power LSI device for use in next-generation supercomputers with 5GHz-clocked operation and next-generation network (NGN) servers, the companies said.

Silicon LSI devices consist of CMOS transistors and multilevel interconnects that connect the transistors. Device scaling has resulted in increased integration density and operation speed. The interconnect parasitic capacitance, however, is increased by simple scaling, enlarging the power consumption and the signal delay.

Starting from the 90nm-node, low-k dielectric films have been implemented into the multilayer interconnects to reduce the parasitic capacitance. With further miniaturization of the 45nm-node, precise control of the critical dimension (CD) became difficult in the low-k films patterned without any etching damages. Unwillingly, rigid silica layers were incorporated in the low-k film stacks, which had the unwanted effect of pushing the effective dielectric constant keff.

To address this problem, NEC and NEC Electronics said they developed a unique "seamless low-k stack structure" without any high-k silica layers. The parasitic capacitance of 140nm-pitched lines has been reduced to 85fF/mm, touted to be the world's lowest, with an effective dielectric constant of keff=2.9. Along with the low-k seamless stack, a special self-organizing etching technology that is highly sensitive to the chemical composition and density of the low-k films was developed.

Consequently, the interconnect-loaded basic circuits of 45nm-node CMOS transistors with 30nm gate-length have been successfully operated to confirm the feasibility of 5GHz-clocked LSI operation even with low power supply voltage such as 0.9V, explained the companies.




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