Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
?
EE Times-Asia > EDA/IP
?
?
EDA/IP??

New FPGA family from Xilinx offers 30 percent increased performance

Posted: 31 May 2006 ?? ?Print Version ?Bookmark and Share

Keywords:Xilinx FPGA? Virtex-5? 65nm Xilinx ASMBL? Modular Block Advanced Silicon? Xilinx Per Holmberg?

Holmberg: By moving to 65nm, we can provide higher performance and lower power to our costumers.

Xilinx Inc. recently unveiled its latest Virtex-5 family of FPGAs, which is built on 65nm triple-oxide technology, new ExpressFabric technology and Advanced Silicon Modular Block (ASMBL) architecture.

Per Holmberg, director of programmable digital systems marketing for Xilinx, said that by moving to 65nm technology, Xilinx can provide higher performance and lower power to their costumers. "With 65nm, we can increase the performance on average by 30 percent and lower the dynamic power by 35 percent, while maintaining the same low static power of 90nm, which is really going against the trend," he exclaimed.

Based on the ASMBL architecture, the Virtex-5 family includes four domain-optimized platforms for high-speed logic, DSP, embedded processing and serial connectivity applications to match end-product requirements. The ExpressFabric technology enables the Virtex-5 family to feature what is said to be the first look-up table structure with six independent inputs, and a new diagonal interconnect structure that reduces logic levels and improves signal interconnect between building blocks.

The second-generation Sparse Chevron packaging technology enables designers to use up to 1,200 user I/Os, supporting 1.25Gbps double data rate and 800Mbps single-ended with highest signal integrity and lowest system noise, while simplifying PCB layout. Second-generation ChipSync technology, available in every I/O, is also enhanced for improved dynamic field recalibration of clock/data in source-synchronous interfaces. The Virtex-5 family also provides 65 percent more logic cells (330,000 logic cells) and 25 percent more user I/Os (1,200 I/Os) compared to previous-generation FPGAs.

"As in the Virtex-4 family, we are using the ASMBL architecture that allows us to provide customers multiple platforms in a cost-effective manner, where each platform is optimized for a main application. The first platform¡ªVirtex-5 LX¡ªis focused on the more traditional FPGA design¡ªthe logic design," explained Holmberg.

Cheng: Since we [Asia-Pacific] do not have the legacy of older systems, we are able to run ahead of other geographies when we implement new communications systems.

Currently, only the Virtex-5 LX platform, which is designed for high-performance logic, is available for shipping. The Virtex-5 LXT, SXT and FXT will be released in 2007.

Xilinx conducted more than 100 interviews with system designers worldwide to define its next-generation Virtex-5 product line. According to Cheng Hing-Nan, the marketing director for Xilinx Asia-Pacific, customers requested for higher performance, lower power, high-bandwidth interfaces, lower system cost and shorter design cycles.

"When we compare an ASIC design vs. an FPGA design, there is a shortening on average of about 55 percent in design cycle time. Using an FPGA will allow the customer not only to get to the market faster, but also to reduce the risk to rewrite and make changes even after they launch their products. This is one great advantage of using FPGA," Cheng stressed.

Triple-play growth for programmability
Holmberg said that the whole communications sector is in for an upsurge and an overhaul, and that it will be driven by the convergence of voice, video and data on the same network. This is also known as triple play or digital convergence.

However, Xilinx believes that traditional solutions cannot meet infrastructure market requirements for performance, capability, power, cost, time-to-market and flexibility.

"To support these new services and capabilities, infrastructure for communications needs an overhaul. Some companies are actually adding a fourth element to this and that is mobility¡ªthe ability to access a network from any type of device," Holmberg said. "We see this need as a fantastic opportunity for programmable solutions."

Asked to comment on the growth of triple-play in Asia Pacific, Cheng said, "Since we do not have the legacy of older systems, we are able to run ahead of other geographies when we implement new communications systems. I am not saying that we are leading, but we are definitely not lagging behind the United States and Europe."

- Margarette Teodosio
Electronic Engineering Times-Asia




Article Comments - New FPGA family from Xilinx offers 3...
Comments:??
*? You can enter [0] more charecters.
*Verify code:
?
?
Webinars

Seminars

Visit Asia Webinars to learn about the latest in technology and get practical design tips.

?
?
Back to Top