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Solution eases nano-era post-silicon validation

Posted: 06 Jul 2006 ?? ?Print Version ?Bookmark and Share

Keywords:DAFCA? ClearBlue 2006.1? silicon debug?

DAFCA Inc. has announced the production release of ClearBlue version 2006.1. According to the company, the ClearBlue product suite contains software modules and silicon debug infrastructure intellectual property (IP) that has been specifically developed to address the post-silicon validation challenges of nano-era semiconductor product design.

SoC design teams can incorporate ClearBlue's patented, reconfigurable fabric during RTL development, DAFCA said, enabling powerful at-speed observation, diagnosis, and debug that accelerates validation and system-level bring-up with early silicon engineering samples.

Pre-silicon, the ClearBlue Instrumentation Studio software delivers a user-directed environment for insertion of the reconfigurable debug instruments (ReDI) into the SoC RTL. Post-silicon, the ClearBlue Debugger offers a wide spectrum of configurable, at-speed analysis capabilities, including signal trace, on-chip logic analyzers, event- and assertion-based debug, and performance monitoring, that all feed directly into standard graphical debug software formats, including FSDB and VCD. ClearBlue supports the standard IEEE JTAG port for communication and control of the ReDI enabled SoC designs.

ClearBlue 2006.1 is available today for use with Verilog and VHDL designs, running on Linux workstations. ClearBlue is tightly integrated with existing RTL-based design flows and interoperates with the tool suites of the major EDA vendors.




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