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Altos Design unveils automated library characterizer

Posted: 11 Jul 2006 ?? ?Print Version ?Bookmark and Share

Keywords:Altos Design? Liberate? cell characterizer?

Altos Design Automation Inc., a developer of cell characterization technology, has announced its first product, Liberate, a high-speed, fully-automated library characterizer for standard cells and I/Os that supports the creation of advanced current source models for timing (CCS and ECSM) and signal integrity (CCSN).

Liberate promises a significant reduction in characterization costs and turnaround timeas much as ten times run time improvementcoupled with improvements in ease-of-use and model quality.

"Characterization has become increasingly challenging due to both the increase in the number of views and the complexity of the cells required to support low-power, high-yielding nanometer designs," said Jim McCanny, Altos CEO and co-founder. "Liberate, because of its fast performance and the quality of its models, enables designers to get all the views they need to fully validate their design, thereby reducing the risk of silicon failure."

According to the company, Liberate uses a novel "inside view" approach for characterization. Rather than the traditional black-box method, each circuit is pre-analyzed to determine the minimal required set of simulation vectors, the most optimal way to condition each simulation and initial bounds for constraint determination. By using automatic vector generation, Liberate avoids potential errors caused by manual or pseudo-manual vector creation where certain logic states can be overlooked, increasing the risk of silicon failure. This is especially helpful for complex cells such as state retention flops that deploy power gating techniques and sleep modes to reduce power consumption.

"New models such as CCSN for signal integrity require a new approach to characterization," said Ken Tseng, Altos CTO and co-founder. "The black-box approach that is widely used by many existing tools is no longer effective. By performing upfront circuit analysis to understand the internals of each cell, characterization time can be dramatically reduced and improved models can be created."

Once the correct stimulus for each circuit is determined, the simulations can be performed either by the company's built-in Spice engine or by a 3rd party circuit simulator such as Spectre, Hspice or Eldo. Using the combination of Altos' "inside view" circuit analysis and the integrated simulator results in an order of magnitude improvement in characterization turnaround time and a highly-accurate cell model where every logic state is accounted for, explained the company.

In addition to the traditional non-linear delay, power and signal integrity models, said Altos, Liberate generates advanced current source timing models that are especially effective at modeling the impact of voltage drop on delay.

"Advanced current source timing models such as CCS and ECSM require careful selection of the sampling points," said Kevin Chou, Altos VP of engineering and co-founder, "Select too many points and the library data size explodes, select too few and you lose accuracy. Liberate is able to capture the correct number of samples via on-the-fly validation and dynamically adjusting the sample range to minimize size while ensuring accuracy."

U.S. pricing for the Liberate library characterizer starts at $95,000 for a one-year license.




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