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MIPS-based processors for residential gateways

Posted: 17 Jul 2006 ?? ?Print Version ?Bookmark and Share

Keywords:Loring Wirbel? EE Times? PMC-Sierra Inc.? 7000 multiservice processor? MSP7120?

PMC-Sierra Inc. has developed two spins of its 7000 MIPS-based multiservice processor. The MSP7120 is designed for DSL-based residential gateways using ADSL2+, and the MSP7130 for networks using passive optical networks (PONs) in conjunction with VDSL. The latter processor carries special relevance following PMC's April acquisition of PON transceiver specialist Passave Inc.

Both processors are intended to be used in advanced residential gateways that must aggregate multiple low-latency streams of IPTV and VoIP. In fact, the MSP71xx family was originally designed for VoIP, but the MIPS core features proved suitable for video delivery in the home.

Hamish Dobson, manager of residential gateway product marketing at PMC, said that hardware multithreading in the MIPS core was a more effective way to improve system throughput than such traditional methods as expanding cache sizes or using on-chip SRAM. The single MIPS core with common fetches and caches can be partitioned into two virtual cores, with control-plane and datapath duties allocated according to designer demands and cycles allocated across virtual engines on the fly.

Fast 'channel changing'
The granularity of the multithreading allows reduced latency and low packet jitter in video traffic along with faster Internet Group Management Protocol processing, for rapid IPTV "channel changing" between IP flows. The multiservice networking stack implemented in the core provides advanced QoS, including the ability to bridge between Ethernet and 802.11 QoS methods.

PMC has optimized VoIP performance through a virtual-DSP voice engine in the processor.

The processor is based on a 400MHz MIPS core and 32bit 166MHz multiservice bus on which all networking controllers reside. Each bus subsystem supports multilevel priority queuing. The core supports typical IP packet-forwarding performance of 180,000 packets per second.

The MSP7120 integrates a full ADSL2+ modem on the bus, and both processors integrate an IPsec security engine, a USB 2.0 media-access controller (MAC), dual 10/100 Ethernet MACs and dual UARTs. For the MSP7120, the processor interfaces directly to PMC-Sierra's new PM4381 ADSL2+ analog front end. The MSP7130 can interface directly to Passave MAC and transceiver blocks.

PMC-Sierra offers development kits from Green Hills Software and from open-source GNU tool sets. Datapath commands can be developed in C, and designers do not have to optimize the datapath or the software pipelining features, the company said.

- Loring Wirbel
EE Times

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