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DRC tool meets yield challenges of nanometer era

Posted: 18 Jul 2006 ?? ?Print Version ?Bookmark and Share

Keywords:Mentor? Calibre nmDRC tool? traditional design rule checking? DRC?

Mentor Graphics Corp. has announced the immediate availability of the Calibre nmDRC tool, which the company said redefines the traditional design rule checking (DRC) step by dramatically reducing total cycle time and integrating critical elements such as critical area analysis and critical feature identification, all required to solve the yield challenges of the nanometer era.

Calibre nmDRC is part of a new platform from Mentor, the Calibre nm Platform, which the company said signals a major shift in the way the EDA industry addresses the complexity of nanometer design.

In nanometer technology, physical verification has become a sophisticated, multistage process that demands highly integrated approaches to the processing and handling of huge amounts of complex design data. Total cycle time is on the rise due to more complex and larger designs, higher error counts and more verification iterations.

Mentor said its new DRC tool responds to the need for reduced cycle time through four key capabilities that differentiate it from traditional DRC tools:
The Hyperscaling technology that brings superior scalability and lightening fast run times for computationally intense applications.
The Dynamic Results Visualization and Incremental DRC that radically change the traditional sequential flow of the iteration process.
The Integrated DFM analysis and enhancement that enable layout tradeoffs to minimize random, systematic and parametric yield loss.
The Direct database access that liberates designers to more easily use Calibre nmDRC throughout the flow, regardless of their choice of design creation environment.

Complexity of design at 65nm
At 65nm, design signoff is no longer just DRC and layout versus schematic (LVS). These basic components of physical verification are being augmented by an expansive set of yield analysis capabilities as well as layout enhancements, and printability and performance validation. In addition, the increasing complexity of nanometer design rules reflects the fact that it is getting harder and harder to guide layout engineers, and their tools, to produce manufacturable layouts using traditional signoff approaches. In the nanometer era, traditional compliance-based signoff, DRC/LVS and post-layout analysis using the as-drawn layout, does not produce designs with the desired yield.

To ensure high yields when using nanometer process technology, designers require new information and new levels of judgment that go beyond design rule checking to yield analysis. They need new ways to assess the quality of their designs in light of the more complex process constraints and larger process variations they now face. They need new ways to see the impact these constraints and variations have on the quality of their designs. Finally, they need a new kind of work environment that allows them to understand which of these effects is the most important to address during the process of improving design quality. Mentor said its Calibre nm Platform provides an answer to this substantial change in the requirements for design signoff.

To address the "new reality" of nanometer era designs, Mentor said the Calibre nm Platform leverages next-generation technology in litho-friendly design (LFD), DRC, resolution enhancement technology (RET), and post-layout parasitic extraction and analysis to help design teams transition efficiently from a rule-based approach to a model-based approach where silicon accuracy and design cycle time is greatly improved.

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