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Dispersion chip warms up new 10GbE form factor

Posted: 31 Jul 2006 ?? ?Print Version ?Bookmark and Share

Keywords:Loring Wirbel? Quake? 10GbE transceiver?

Many electronic dispersion-compensation (EDC) semiconductor specialists have found a lot to like in a new transceiver form factor for 10Gbit Ethernet: enhanced Small Form Factor Pluggable (SFP+). But Quake Technologies Inc. may be the first signal-conditioning company to bypass an XFP module solution completely in favor of SFP+.

In addition to moving its QT2035S SFP+ chip to alpha sampling in early August, Quake will embark on an evangelizing mission this fall with Picolight Corp. and other vendors, promoting the use of SFP+ to support a proposed "short-reach multimode" standard for 10Gbit Ethernet. Quake and Picolight demonstrated a multimode-fiber solution at the recent Interop show, running 10Gbit signals over 1,300m distances.

For close to a year, developers from the 10GbE community have been attending meetings of the American National Standards Institute's T11 working group, hoping that an upgrade to the SFP module defined by Fibre Channel might suit lower-cost Ethernet interfaces. Fiber-based networks using the XFP (10Gbit Form Factor Pluggable) module are still priced at 10 times the cost of a first-generation SFP module.

"We looked at where optical-component manufacturing costs for XFP were going and said, 'what's the point of even designing chips for XFP?'," said Mitch Kahn, VP of marketing for Ottawa-based Quake. "It made more sense to move straight to SFP+."

SFP+ is small in part because both the clocking and the signal-conditioning chips are removed from the transceiver module and placed back on the line card. This is not specified explicitly in the standard, Kahn said, but represents the lowest-cost implementation.

In an XFP module, the EDC block requires a linear signal. But the XFP module outputs a digital signal, so the chip must be placed inside the module, next to a linear amp. SFP+ uses a linear interface called XFI+, which makes it easy to place EDC inside physical-layer chip implementations.

In addition, the SFP+ power envelope is too tight to allow an EDC chip inside the module.

Quake's QT2035S SFP+ chip uses a combination of Xaui and XFI+ interfaces. It supports all 10GbE fiber interfaces, from short to extended reach. The 130nm CMOS chip dissipates 1.3W in long-reach multimode applications and 950mW in non-LRM applications.

An embedded mixed-signal EDC engine with automatic gain control adapts to fiber modal changes, in part through predictive algorithms that are controlled through an on-chip programmable adaptation processor. The XFI+ transmit interface offers programmable wave shaping to compensate for different connector types, while the XFI+ receive interface supports a variety of linear receive optical subassemblies (ROSAs). The transmit and receive Xaui interfaces on the system side of the chip offer embedded pre-emphasis and equalization, and operate up to 3.1875Gbps to support both Ethernet and Fibre Channel rates.

Also on the chip are a clock multiplier and independent interfaces for a MAC chip, an I2C interface for nonvolatile memory, and a general-purpose I/O. A special wide-area network interface allows the chip to be used in Sonet networks.

The QT2035S supports a variety of loopback tests and has several pseudorandom bit sequence patterns for testing. An embedded eye monitor can check 10GbE eye diagrams.

Kahn of Quake said 850nm, 4Gbps Fibre Channel-grade lasers could be used in the transmit optical subassembly block using an SFP+ model, and linear receivers could be used in ROSAs.

"The real issue here is getting the optical-module vendors to think of lower costs and higher volumes, when they've been conditioned to think of high-cost transceivers," Kahn said. "We think that using SFP+ for a 10GBase-SRM solution could be ideal for the data center."

- Loring Wirbel
EE Times




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