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512Mbyte DDR SDRAM suits high-reliability apps

Posted: 15 Sep 2006 ?? ?Print Version ?Bookmark and Share

Keywords:White Electronic Designs? W3E64M72S-XSBX? DDR SDRAM?

White Electronic Designs Corp. has launched its 4Gbit (512MByte) DDR SDRAM PBGA Multi-Chip Package (MCP).

The SDRAM is organized as 64M x 72, packaged in a 25-by-32mm, 800mm?, 219 plastic ball grid array (PBGA). This package is suitable for high-reliability applications and is available at data rates of 200-, 250-, 266- and 333Mbps in commercial, industrial and military temperature ranges.

The units offer a 66 percent space savings versus a comparable density using TSOPs, 55 percent I/O reduction versus TSOP, reduced trace lengths for lower parasitic capacitance and reduced part count. It delivers high density for increased performance.

WEDC's new DDR SDRAM MCP features internal pipelined DDR architecture enabling two data accesses per clock cycle. The SDRAM provides programmable Read or Write burst lengths of 2, 4 or 8, four internal banks allow concurrent operation and it features bi-directional data strobe per byte for transmitting and receiving data.

WEDC's 64M x 72 DDR SDRAM MCP, designated as part number W3E64M72S-XSBX, will be available Q4 2006 and priced at $400 each in volumes of 1,000 pieces.

- Marty Gold

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