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PCB designers struggle with cost issues

Posted: 18 Sep 2006 ?? ?Print Version ?Bookmark and Share

Keywords:PCB designs? EDA survey? FPGA? ASIC? ASSP?

With PCB designs getting faster and more complicated, designers are starting to fret about signal integrity, thermal issues and EMI. But respondents to the PCB portion of the EE Times 2006 EDA Users Survey said that meeting cost budgets is their greatest concern.

The survey suggests that simple two- and four-layer boards are giving way to more complex onesat least in North America and Asia. Fifty-two percent of North American respondents, 39 percent of European respondents and 56 percent of Asian respondents are designing boards with five or more layers. A quarter of North Americans are designing with nine layers or more. Clock speeds are fast and getting faster. North American board designs lead the pack, with a mean clock speed of 837MHz today, rising to an expected 1.43GHz in two years.

The PCB survey was completed by 622 engineers, including 379 from North America, 128 from Europe and 98 from Asia. On average, electronic-system designs contain about three PCBs, two FPGAs and two ASICs or ASSPs.

More than half of the North American and Asian PCB designers said their companies outsource some portion of board design, but most of this outsourcing takes place in the local geography. In terms of EDA, board designers are generally most satisfied with the accuracy of their tools and least satisfied with pricing and licensing

Cost tops concern list
The biggest single concern, in all three geographies, is meeting cost budgets. Fifty-five percent of North Americans termed this issue "very critical," but signal integrity (SI) was close behind at 54 percent. Asked what issues will become more critical as boards get more complex, North Americans pointed to component edge rates and IC package parasitics. Compared with the 2005 survey, which focused just on North America, there's considerably more concern in 2006 about SI, thermal/EMI and IC package parasitics.

Europeans seemed most concerned about SI getting worse, but today, only 34 percent of European designers see it as "very critical." Asians said that component edge rates and IC package parasitics are getting slightly worse.

Asians tend to see meeting cost budgets as a decreasing concern over time, and there may be a reason: Their EDA tool budgets are growing faster than in other geographies. Half of Asians said their EDA tool budgets increased in 2006, compared with 31 percent of North Americans and 29 percent of Europeans.

One way of addressing cost concerns is outsourcing, and 53 percent of North Americans, 47 percent of Europeans and 52 percent of Asians said their companies outsource some portion of board design. In North America, layout and thermal/EMI analysis are the tasks most frequently sent out of house.

As was the case with the IC survey, most PCB outsourcing is not offshore. Fully 91 percent of North Americans said their companies outsource design work to North America, while 18 percent identified China/Taiwan and 14 percent fingered India (Totals exceed 100 percent because respondents were asked to check all that apply.). Likewise, Europeans most frequently outsource to Europe, and Asians to Asia.

It's no surprise that well-established tools like schematic capture and layout are most commonly used today. But analysis tools are coming on strong. Twenty-seven percent of North Americans use thermal analysis today and an additional 29 percent expect to use it in two years. Nineteen percent use EMI compliance tools and an additional 29 percent expect to use it in two years. Forty percent use SI analysis and an additional 24 percent expect to use it in two years.

EMI analysis is rapidly rising in Europe, where 20 percent use it today and an additional 43 percent expect to use it in two years. In Asia, 29 percent use EMI analysis today and an additional 44 percent expect to use it in two years.

Asked to evaluate the various types of PCB tools, respondents were generally happiest with well-established products and least satisfied with emerging ones. For example, while 60 percent of North Americans said they're happy with schematic capture, only 35 percent said they were satisfied with SI and 34 percent with thermal/EMI analysis. Results from Europe and Asia were similar.

In terms of those tools' features, North Americans and Europeans were most pleased with accuracy, while Asians put "ease of use" at the top of the list. Satisfaction was lowest in all geographies with cost of ownership, cost of purchase, interoperability and automation. Compared with 2005, however, North American PCB designers are considerably more satisfied with most criteria. However, the ability to handle large designs has slipped.

Vendor ratings
OrCAD is the most widely used PCB tool vendor in North America and Europe, with 48 percent of respondents in both areas naming that provider. Mentor Graphics Corp., No. 2 in North America and Europe, leads in Asia at 62 percent. In descending order, North American designers also cited Cadence, Mathworks, Electronics Workbench, Agilent EEsof, Altium, Ansoft, Flomerics, Sigrity, Zuken and Valor. Zuken was very low in North America (3 percent) but much higher in Europe (14 percent) and Asia (13 percent). The biggest up-and-comer is Agilent EEsof, used by 10 percent of respondents last year and 17 percent this year.

In terms of vendor satisfaction ratings, Mathworks topped the list in North America, where 67 percent said they were "very" or "somewhat" satisfied with that supplier. For Asians, however, Cadence was No. 1, while Ansoft led for Europeans.

North American designers are more satisfied with every PCB tool vendor than they were in 2005. The biggest gainer is Ansoft, which went from a 42 percent satisfaction rating to 55 percent. Agilent EEsof and Cadence also enjoyed double-digit gains in satisfaction.

- Richard Goering
EE Times

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