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Debugger speeds embedded MPU test

Posted: 02 Oct 2006 ?? ?Print Version ?Bookmark and Share

Keywords:Macraigor? J-Scan? debugger? programming tool? embedded microprocessors?

Macraigor Systems LLC has upgraded its J-Scan debug and programming tool, giving IC designers visibility and control of every pin on chips that contain 32bit and 64bit embedded microprocessors.

The J-Scan version 2.1 boundary-scan tool communicates with the target with an interface that is compatible with USB 1.1 or USB 2.0. It is 10 times faster than the previous version. The new version also supports programming of devices with the serial peripheral flash interface, including FPGAs and other embedded devices.

The company said the J-Scan tool gives designers the ability to observe in real-time the behavior of the pins of a chip packaged in a BGA. The tool lets designers manually place the pins in any logic state.

Craig Haller, chief engineer at the company, said designers can now observe logic-state transitions and instruction addresses sent and received across individual pins, speeding the debug process for SoCs and other ICs, and for new board designs.

- David Lammers
EE Times

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