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Startups take on analog design automation

Posted: 16 Oct 2006 ?? ?Print Version ?Bookmark and Share

Keywords:Infiniscale? SynCira? TechModeler? Analog Layout Integrated Synthesis? analog synthesis?

Automating analog IC design has proven to be a tough challenge, but two EDA startups are promising to do just that with a new "analog synthesis" technology. Infiniscale SA is offering behavioral modeling with automatic resizing and optimization, while SynCira Corp. is preparing an electrical-driven hierarchical analog layout synthesis tool.

Neither company offers a direct analogy to digital-logic synthesis, which maps RTL code into gate-level netlists and standard-cell libraries. But both are claiming to automate portions of the analog design flow that require a great deal of manual effort today.

Infiniscale claims its behavioral-modeling capability will serve design-for-manufacturing (DFM), design-for-yield and technology-CAD applications. "What we're proposing is a model-based solution," said Firas Mohamed, Infiniscale's president and CEO. "It's difficult to do real DFM based on simulation."

Infiniscale's TechModeler takes in measured or simulated samples, including the output of Spice simulations or electromagnetic simulations. Users provide specifications and mathematical properties.

TechModeler generates analytical Verilog-AMS and VHDL-AMS models for such devices as inductors, transformers, oscillators and PLLs. These models can be used for tasks like sensitivity analysis and statistical yield optimization as well as simulation.

Compared with such classical methods as look-up tables or design-of-experiment techniques, TechModeler provides more accurate results for difficult problems, according to Infiniscale. It generates parameterized models and supports encryption for intellectual property. Applications include device-level modeling, nanometer silicon modeling and MEMS.

The models generated by TechModeler can then be fed into TechSynthesizer, which promises to automatically "synthesize" devices and circuits for any process technology.

Applications for TechModeler include active and passive components, MEMS, integrated sensors, RF and analog circuits, systems-in-package, and process technology development and application. Infiniscale claims this technology has been validated on an STMicroelectronics BGA inductor.

For its part, SynCira is motivated by the idea of automating the layout process so it can be easily accomplished by circuit designers, said Shufan Chan, president and CTO.

The company's Analog Layout Integrated Synthesis tool works within transistor-level layout design environments, and automates floor planning, device placement and routing. It claims to rapidly retarget layouts based on new or changing netlists and design rules. The tool takes in Spice netlists and generates GDSII layouts.

In addition to generating layouts, SynCira's tool includes a "netlist analyzer" that examines the Spice netlist and drives critical device placement and routing automatically. Issues such as cross-quading, interleaving, routing capacitance loading, electromigration, latchup, antenna effects and multiple fingers are automatically included in the layout.

Chan noted that the layout synthesizer packs transistors as tightly as possible, and provides the aspect ratio the user wants. It can generate a whole family of layouts from which the user can choose, he said.

Each layer of hierarchy can handle about 100 transistors, and there's no limit to the hierarchy, according to Chan. He said the tool was able to generate a layout for a comparator with 240 transistors and four levels of hierarchy in five hours. The tool supports distributed processing and works with existing layout editors.

At present, SynCira is preparing to go into beta sites with its technology.

- Richard Goering
EE Times

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