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EDA panelists call for standardized process design kits

Posted: 14 Nov 2006 ?? ?Print Version ?Bookmark and Share

Keywords:Synopsys? process design kits? process design kit? PDK? PDKs?

Standardization of foundry process design kits (PDKs) will provide major benefits for analog and custom IC designers, according to panelists at last week's Synopsys EDA Interoperability Developer's Forum. However, the one EDA vendor with the greatest potential influenceCadence Design Systems was notably absent from the panel.

Rich Goldman, vice president for strategic market development at Synopsys, introduced the panel and said that Cadence had declined an invitation to attend. Cadence is the dominant provider of analog IC design tools, and many foundry PDKs contain parameterized cells (p-cells) written in Skill, a Cadence proprietary language.

PDKs include the design rules, device models, schematic symbols, technology files, p-cells, and fixed layouts that analog and custom designers need to design ICs. As of today, each foundry is creating specialized PDKs for different EDA vendors and tools.

Without standardization, Goldman said, design houses today are stuck with incompatible kits from foundries, incomplete kits that can't be extended, and limited support for new, advanced tools. EDA vendors often find foundries won't support new tools. Results, he said, include increased cost, extended schedules, redundant efforts, and impeded innovation.

While the OpenAccess database is a "great start," Goldman said, it's not enough. He called for an open-source language for p-cells. He also said that design kit standardization possibilities include graphic symbols, parameter names, and netlist information.

Goldman expressed skepticism about the OpenKit Initiative, which was launched by Accellera in 2003 and transferred to the Silicon Integration Initiative (Si2) last June. It attempted to establish some standards around schematic symbols and common data sets, files and models.

"I haven't seen any movement in OpenKit since it went to Si2," Goldman said. "It does concern me that maybe it did go there as a place to die. I'm not sure Si2 can afford to offend Cadence."

James Lin, vice president of the technology infrastructure group at National Semiconductor, noted that different tools require different PDKs, and that it's difficult for National to use PDKs provided by external foundries. PDK standardization is a "crucial step" for interoperability, he said. Opportunities for standardization, he said, include symbols, libraries, device parameters, device properties, Spice modeling formats, and formula computation.

"It's gotten to the point where we're having to turn PDKs more frequently than once a week," complained John Goodenough, director of design technology at ARM Ltd. Matching foundry process data to an EDA tool format is tough, he said, because "the two sides don't talk in a coordinated way." Goodenough said that a standard taxonomy is needed now for 32nm design.

Walter Ng, senior director of platform alliances at Chartered Semiconductor, noted that foundries must provide a number of proprietary device generators that support similar features. "It's all extra work for foundries, and you can count on less than one had the resources foundries have working on custom design kits," he said.

As a result, Ng said, it's tough for foundries to support new tools or startups, and that stifles innovation. What's needed, Ng said, are interoperable, non-proprietary p-cells for OpenAccess. Startup CiraNova, which offers a tool that generates OpenAccess p-cells, has a "one solution that looks to be promising," Ng said.

Silicon Canvas competes with Cadence in the custom IC design market, and that company wants "truly open" PDKs, according to Hau-Yung Chen, president. He suggested renaming PDKs because the name "carries too much of a single company image." He also called for a ban on proprietary languages, and a "ban on any vendors who want to hijack the open system with proprietary stuff."

"Cadence has a lock on the industry and has no business incentive to open," said James Spoto, president and CEO of Analog Wave Research. "We as an industry have to do something about that." As of now, he said, the analog EDA industry is building a "Tower of Babel" and is stifling innovation.

While OpenAccess is a good first step, the industry should "push hard" for interoperable p-cells, Spoto said. There would be a boost in productivity, he said, if p-cells could be developed in languages like Python or Tcl.

In the question and answer period, Chartered's Ng said that vendors shouldn't wait for Cadence to get started on PDK standards. "It's not just Cadence, but all the companies have their own formats," he said. "So band together and interoperate. Cadence can join or not, but you guys can move forward."

Several panelists noted that Cadence's Virtuoso layout editor now runs on OpenAccess, and that OpenAccess can take p-cells that are not written in Skill. Foundries could thus create PDKs in Tcl or Python, and these would work with Virtuoso and other tools, Goldman said.

"It's being considered," Ng replied. "It's the right direction, and I think it just takes time."

- Richard Goering
EE Times

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